Fix register confusion in non-VFP3 BinaryOpStubs on ARM (issue 11413014)

[jkum...@chromium.org]

Reviewers: Yang,

Message:
PTAL.

Most of the changes are simple renamings to increase sanity levels; but
there
are also no less than four real bug fixes :-)


https://codereview.chromium.org/11413014/diff/1/src/arm/code-stubs-arm.cc
File src/arm/code-stubs-arm.cc (right):

https://codereview.chromium.org/11413014/diff/1/src/arm/code-stubs-arm.cc#newcode870
src/arm/code-stubs-arm.cc:870: __ bic(scratch1, dst_exponent,
Operand(HeapNumber::kSignMask));
Bug fix 1: This code cleared the mantissa's sign bit!

https://codereview.chromium.org/11413014/diff/1/src/arm/code-stubs-arm.cc#newcode878
src/arm/code-stubs-arm.cc:878: DoubleIs32BitInteger(masm, dst_exponent,
dst_mantissa, scratch1, scratch2,
Bug fix 2: This call passed in the exponent/mantissa registers in the
wrong order.

https://codereview.chromium.org/11413014/diff/1/src/arm/code-stubs-arm.cc#newcode883
src/arm/code-stubs-arm.cc:883: __ Pop(dst_exponent, dst_mantissa);
Bug fix 3: Restore the "object" register before reloading the double
value from it.

https://codereview.chromium.org/11413014/diff/1/src/arm/code-stubs-arm.cc#newcode891
src/arm/code-stubs-arm.cc:891: __ Pop(dst_exponent, dst_mantissa);
Bug fix 4: Restore original inputs before calling the runtime.

Description:
Fix register confusion in non-VFP3 BinaryOpStubs on ARM


Please review this at https://codereview.chromium.org/11413014/

SVN Base: https://v8.googlecode.com/svn/branches/bleeding_edge

Affected files:
M src/arm/code-stubs-arm.cc
M src/arm/stub-cache-arm.cc

[yan...@chromium.org]

LGTM. Nice catch!

https://codereview.chromium.org/11413014/