TimingAnalyzer

Hi All, This update fixes a major issue with the last Windows OS version. Fix - Popup menus in

Hi All, This release fixes a few minor issues that were reported recently. Fix - zoom in by dragging

Hi All, This new version beta 0.992 is available for download from the website: www.timing-diagrams.

Hi Dave, You can download the latest version b0.9936 from: www.dmad-systems.com/TimingAnalyzer/

Hi Andrew, I don't want to mislead you or anyone using the TimingAnalyzer. I just wanted to let

Hello Abhijit Pethkar, More gates will be added as built-in functions in the future. These would

I'll check it out then! Thank you a whole lot for providing this, the VLSI community needs (

Thank you for the update Dan; much appreciated! On Mon, Apr 1, 2019 at 11:15 AM Dan Fabrizio <

Hi Pedro, No. Not currently. I could create a new google group to track issues or provide a list of

Hi Salman, Click in the bus during each clock cycle and the bus value will increment automatically by

Hi Pedro, Thanks for your kind words about the program. Let me know if you have any other questions

OK, thanks!

Hi Fred, I just saw this message. Sorry. Google groups somehow marked it as spam but allowed me to

Thanks for replay. I understood what it is. If I select a signal line, if I select off the line, if I

Hi John-Paul, I will put that on my list to fix. Thanks for the feedback. I'm working on a set

Hi Scott, I will add a check to make sure the file exists for the files in both the open_file_list

Ok, it's fine... I got it now, there is 3-4 possible select with right-click menu 1) Right click

Hi All, I released a new beta version (0.9897). All fixes this time. Fixed - long load times on

Hi Gary, Adding async pulses work just like synchronous pulses but instead of using a clock cycle to

Added context menu 'Right-Mouse' on pulses to Delete, Modify, Change Width, etc. On Saturday,

Hi Fabio, I'm glad to hear things are working better for you. Going forward my focus is on fixing

Hi Jason, Did it work at any time since you downloaded it? I have seen problems starting because of

I happy to announce this new version should be ready sometime during the weekend after Thanksgiving.

Hi All, If you need to use the TimingAnalyzer on HiDPI resolution monitors, you can use a preliminary

Awesome! Thank you

Hi Ahmed, I put the new version on the website. This has the fix for the edge missing after the

Hi Ahmed, I see what your talking about now and hope to have a fix sometime this week. Thanks, Dan On

Hi Ed, I fixed both issues in the beta 0.985 version. Try it when you get a chance. Thanks, Dan On

When a bus in VCD happens to change at the last timepoint, then that value gets used for the previous

Hi All, I have released a couple of new versions recently to fix issues mainly related to VCD file

Hi Ed, Sure. No problem. I think a good script would be to automatically parse a verilog or vhdl

No problem, here you go. The two buses to observe are named 'm_data' and 'mrdata_i_r'

Hi Ed, Can you send me the vcd file? Thanks, Dan On Wed, May 27, 2015 at 2:39 PM, 'Ed Carstens