Z67-IDE+

[Kenneth L. Owen]

Hi All,

Looks like Norberto has done it again! About the time I was getting
accustomed to being able to boot into CP/M with 15 partitions of 8 MB on
a hard disk, things changed! Then I had to decide whether to boot into
HDOS with 7 partitions of 1.8 MB or into CP/M with the 15 partitions of
8 MB. So, now it's changing again!

Since there was a lot of space in the CF card that was not being used,
Norberto decided to redefine the system to allow switch selection of any
1 of 8 systems that would boot either HDOS (or CP/M) on drive 0 or CP/M
on drive 1 when using a 4GB CF card.

Now the biggest problem is reminiscent of my floppy days: Which disk has
that program or file?

I been giving this a bit of thought and decided that I would get the
groups input to probably arrive at a better solution than I would come
to on my own. So far, I have considered letting the systems be defined
by basic function. For example:
. System 0 – general use
. System 1 – word processing
. System 3 – programming
. . . etc. ...

Then, within the drive partitioning, get a bit creative with naming:

HDOS:

. Partition 0 – Boot System, where disk label defines the system
environment
. Partition 1 – Data 1 where the disk label defines the general contents
. . . etc. ...

This way, the mount of a partition will announce the genre of the
partition.

CP/M:

Here we have a bit more flexibility. Since Norberto's recommendation is
the leave partition 0 at a minimum allocation and non-bootable, we will
be presented a list of the defined partitions from which to select a
partition to boot. The partition naming is pretty flexible as long it
will fit into the name space. We just need to a way to designate if the
partition is for data or system boot.

For each boot partition, we can set it to automatically run a batch file
(submit ????.sub) to mount up to three other partitions that are used
with the boot system (and then start ZCPR).

Additionally, we have the user areas to further segregate the data. We
can log into user 0 to 15 and, if running ZCPR, can use 16 through 31 to
house the support files to keep the clutter down on the logged
partitions. The ZCPR community has somewhat set some standards for what
generally should go where. Between public directories and paths, it's
pretty flexible.

So, I've launched the thread and will be looking for your input.

– ken

[Norberto Collado]

Hello Ken,

I put together a file for each drive, (DriveX.sub) to mount, format, sysgen
and copy files to each partition. It takes time to do it manually.

I just have one suggestion; the Zenith Z67 system allows the user to
write-protect the Winchester drive. I was thinking about adding a switch to
write protect both CF cards. Or add another BCD switch which allows to
select a given drive and write-protect it.

Any suggestions?

Thanks,

Norberto

[Norberto Collado]

On the write-protect idea, what it makes more sense is to have two switches
to protect each CF card independently. Because I want to be able to
duplicate from one card to the other one due to the extra space, it makes
sense to write-protect the source to protect the data.

Norberto

[Kenneth L. Owen]

Hi Norberto,

I like the separate switch idea the best.

When I'm working with the system, it gets confusing sometimes.
Normally, I will boot from the Z67 and that is my most comfortable
environment due to the most use. When I boot from some other device,
the drives switch and it is easy to specify the wrong device.

When formatting disks, I consistently will remove all disks except the
target just to avoid wiping the wrong disk. I've wished for a WP switch
on the HD more than once. I've only wiped a partition once or twice,
but it takes time to restore!

On the switch, you have my vote for a separate switch for HD0 & HD1.

-- ken

[Norberto Collado]

Hello Ken,

 

Do you recall seen any CP/M messages that the disk was write protected when the switch was enabled on the Z67 back them?

 

I have two choices;

 

1. If the write-protect switch is on for a given HD, then just ignore the write and let the OS know that everything is fine.

 

or

 

2. Alert the OS that the disk is write-protected.

 

Thanks,

 

Norberto

[Kenneth L. Owen]

Hi Norberto,

You're really testing my memory! But, based on my work recently with
the floppy drive when extracting the HDOS Z67 Utilities, there was no
message about write protect unless I tried to write. I believe it gives
a BDOS error. ^C resets the system, after the write protect is removed
the command can be repeated.

I hope this is right. When I get the Z67 card back here, I can test the
Heath Z67 unit to confirm that this is correct.

-- ken

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[Norberto Collado]

Hello Ken,

 

I will like to be able to write-protect the hard drive and also be able to read the data. Once I'm done with the Eight Drive configuration testing on the 4GB card, then I can evaluate on how HDOS & CP/M handles a write-protect condition.

 

So far I completed testing Drive0 (all 15 partitions) and Drive1 (all 15 partitions) without any issues. Because it is time consuming, I can test one Drive configuration per day. 

 

Thanks for the feedback,

 

Norberto

-------- Original Message --------
Subject: RE: [sebhc] Z67-IDE+
From: "Kenneth L. Owen" <tx83...@bellsouth.net>
Date: Tue, January 31, 2012 9:20 am
To: se...@googlegroups.com

Hi Norberto,

[Norberto Collado]

 Ken,

 

Did a simulated software write-protect and CP/M worked fine. I updated the Z67-IDE schematics to support the BCD Switch and HD0 and HD1 write-protect switches as suggested. I will post the schematics tonight at the website.

 

Thanks,

 

Norberto

[Norberto Collado]

Hello Glenn,

On the new Z67-IDE+ board, I can boot CP/M at 2,4 & 8 MHz without any issues
and can read and write as well. With HDOS I can only boot at 2, & 4 MHz. It
fails at 8 MHz. I'm still analyzing with the scope the clock signals to
ensure that they are accurate. Are you aware of any limitations for HDOS at
8MHz based on the Z67 code?

Thanks,

Norberto

[Norberto Collado]

Glenn,

Below are the traces that I took today to understand why HDOS is failing to boot at 8 MHz. Hope this can help in figuring out the issue.

At 2/4 MHz works fine - Booting to HDOS Menu trace
 
29      3_698_418 +CMD - Read(6)     
                       08 00 00 00 0A 80
   30     21_608_686 +DataIn (N)
                   0h: C3 00 23 01 01 20 20 20 ..#..
etc...

92      3_740_936 +CMD - Read(6)     
                       08 00 00 28 03 00
   93     10_187_378 +DataIn (N)
                   0h: 48 44 4F 53 20 20 20 20 HDOS    
                   8h: 20 20 20 20 20 20 20 20         
                  10h: 48 44 4F 53 31 20 20 20 HDOS1
etc...

At 8MHz I get the following CMD and then it hangs;

Booting to HDOS Menu Trace

 29      3_698_418 +CMD - Read(6)     
                       08 00 00 00 0A 80
   30     21_608_686 +DataIn (N)
                   0h: C3 00 23 01 01 20 20 20 ..#..
etc...

It completes the above payload and I do not see the second Read(6) command. Not sure what is the HDOS H67 code doing that will prevent sending out the second  Read(6) CMD if the payload was delivered as expected.

CP/M at 8 MHz is fast! Booting is less than a second.

The CPU is capable of 10 MHz and once set, it fails to power-on at such speed. Can only do at this time 2,4 and 8 MHz. Later I will figure out why if fails to come-up at 10 MHz, perhaps it could be the H8 front panel causing such issue.

Back to the drawing board...

Norberto

[Glenn Roberts]

Well the 6 byte

 

                       08 00 00 00 0A 80

Command is parsed as follows:

 

08 = READ from LUN 0

00 00 00 = starting at sector 0 (i.e. the master boot record)

0A = read 10 consecutive blocks (length of master boot record)

80 = control byte (set for “disable retry”)

 

So this is the command to read in the 10-sector Boot program (the one that then prompts you to enter which partition you want to read).  It is issued by the code in ROM.

 

The second read command:

 

                       08 00 00 28 03 00

is parsed as follows:

 

08 = READ from LUN 0

00 00 28 = first sector of “Superblock A”

03 = read 3 consecutive blocks (the superblocks are 3 sectors long)

00 = control byte

 

This is normally the first read command issued by the boot code once it is loaded into RAM, so it doesn’t get very far into the code.

 

What I don’t understand is what you’re seeing on the screen.  You get the full boot menu displayed?  And then you type “CPM” (or whatever you’ve called your CP/M partition) but if you type “HDOS” (or whatever you’ve named your HDOS partition) it works for CPM but not HDOS?

 

The read of the superblock is the first READ command issued by the Boot (menu) program so that would be executed regardless of which OS you were booting…

 

At first glance it appears that the ROM code works but code that’s loaded into RAM is having some kind of problem…

 

I think I need more info to really diagnose much further…

 

-          Glenn

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[Norberto Collado]

Hello Glenn,

I’m booting CP/M (QuikStor) from the second hard drive (drive1). Then only HDOS from hard drive 0. It just came to me, that I need to replace the Parity IC for a faster one. I ordered the 74F280 for this update and I forgot to update the Z67 board.

I will update the board this weekend and I will retry again or I could add code to delay longer the clocks to ensure that the parity IC has enough time to complete the calculations. I will report back once I get more data, and I’m just anxious to run the PREP67 utility at such speeds.

Thanks for the feedback,

Norberto

[Norberto Collado]

Did try last night using a faster parity IC with same results. Base  on the scope data, the issue seems due to latency and timing problems when emulating an SCSI controller in software.  I’m going to add a Z53C80  controller (PLCC package) to deal with such issues.

Norberto

[Norby]

Update with the Z53C80 SCSI controller:

I removed the 8155 controller and added a Z53C80 SCSI controller
configured to run in Pseudo DMA mode. This means that the
microcontroller is going to send data at a fixed data rate. As I
change the H8 CPU speed from 2 Mhz to 8 Mhz, the clock on the H8 SASI
bus will change but the clock from the Z53C80 is fixed due the nature
of the Pseudo DMA mode. In order to boot HDOS at 2MHz, 4Mhz or 8 Mhz,
I need to change the bus timing for each frequency. I'm doing this
right now manually by changing the register within the DS83C430
microcontroller which allows me to boot HDOS at 2,4 & 8 Mhz without
any issues. Booting HDOS at 8 MHz is amazing! Also I had to change the
microcontroller osc from 20MHZ to 30MHz to be able to boot at the high
clock freq's.

This is the value of a DMA controller, which can adjust the Z53C80
SCSI clock on the fly without any issues. By using a microcontroller
running at 30MHz to do the same job as a real DMA controller is not a
great idea. I guess I do not have a working solution to update the Z67-
IDE controller at this time. Any ideas???

The Z53C80-03 SCSI controller is available in a 44PLCC package and it
fully compatible with the 40 pin NCR5380 SCSI controller.

Thanks,

Norberto

[Norby]

Second Update on the Z53C80 SCSI controller:
After examining the REQ clock for a pulse width for 1us (per Ken Z67
traces), I found that it was about 400ns. After replacing the OSC from
20 MHz to 12 MHz, the pulse width change to 1.05 us and HDOS and CP/M
booted fine when the CPU is at 2/4 MHZ. With the Z53C80 SCSI
controller, I just needed to lower the microcontroller clock rather
than increased it. I will continue to test to have a viable solution
to be able to boot HDOS/CP/M on the H8 when the Z80 is operating at
2/4/8/10 MHz

Once I get a working solution, the “goal” I will add support to the
board to operate as a printer buffer (serial in -> parallel out),
using the CF card as storage, add the calendar clock, I2C Flash, and
two 5 pins connectors to support drive selection per CF card and up to
16 bootable virtual drives. Due to the fact that HDOS uses 16MB per
drive and CP/M uses 8MB per drive, I think I will use 20MB has the
maximum virtual capacity for each drive. This means that 20MB x 16
logical drives/ CF card = 320MB as the maximum storage capacity per CF
card. Also I will be writing to the storage media in a sequential
pattern rather than a linear pattern currently supported with the
multi-drive solution, which is wasting storage space.

The H8 Multi I/O board will drive the H8 Z80 clocks and also to select
the drive to be boot by using the front panel. Also I’m planning in
driving the H8 O2 clock signal with 2MHz constant clock and in sync
with the Z80 Clock. The intent is to be able to read/write to the H17
while the CPU is running above 2MHz. Not sure if this works, but also
I can also supply the clock to the H17 itself; plan B. I will use the
same board foot-print as in the H8-Z37 board with the heat-sink. The
board can also be used externally with two BCD switches; one per CF
card.

I will add support to eliminate the programming jumpers, so no need to
take the board out to be programmed. This should be the “Ultimate” Z67-
IDE+ board.

Another advantage in using the Z53C80 is that it can be programmed to
be an initiator. The Z67-IDE can go out into the SCSI bus select an
old aging drive and create an exact copy of the drive into its
internal CF storage cards. This capability is to preserved data from
old MFM Winchester drives.

Also the code can be rewriting in “C” to support the full SCSI command
set, as a replacement of the aging SCSI drives.

While in this process, I will update the H8-Z67 controller to also use
the same H8-Z37 board foot-print. Also I will add the fixes as well.

Pending boards:

1. H89 speed board (2/4 MHZ) – need to order some for testing
2. H89 OTP conversion board to support the H89-Z37 controller and to
update board to latest version (20 pin to 32 pin conversion adapter).
3. H8 Multi I/O board.

[Glenn Roberts]

Wow. That's a Z67-IDE++ !

-----Original Message-----
From: se...@googlegroups.com [mailto:se...@googlegroups.com] On Behalf Of

1. H89 speed board (2/4 MHZ) - need to order some for testing

2. H89 OTP conversion board to support the H89-Z37 controller and to
update board to latest version (20 pin to 32 pin conversion adapter).
3. H8 Multi I/O board.

[George Farris]

+1 on that. Count me in for an H8 board whenever you get it ready.

Thanks for your hard work on this Norberto.

Cheers
George

[steve shumaker]

oh yes... put me on the wait list for 2

steve

[Kenneth L. Owen]

Hi Norberto,

I'm not quite following you on the drive space calculations.  I agree that on the HDOS side, 20 MB per drive will work and that 16 X 20 MB will total 320 MB.

On the CP/M side, are we still running 15 partitions of 8 MB for each CP/M drive?  8 MB X 15 partitions X 16 drives = 1.92 GB or a 2 GB CF card.

-- ken

[Norberto Collado]

Hello Ken,

 

Yes, that is correct!  I just got into HDOS and forgot about the CP/M calculations.

 

We will need to use the two 2GB CF cards for each OS. This is in order to support both OS, then the max capacity is 120MB/drive.

 

Thanks for the follow-up,

 

 Norberto

 

-------- Original Message --------
Subject: Re: [sebhc] Re: Z67-IDE+
From: "Kenneth L. Owen" <tx83...@bellsouth.net>

[Norby]

Third Update on the Z53C80 SCSI controller:

After replacing all the IC's on the H8-Z67 controller with the "F"
type, now the H8 can boot HDOS/CP/M from the Z67-IDE Z53C80 SCSI
controller when the CPU is at 2,4 & 8 MHz without any issues. All the
timing issues that I was having are gone! Next step is to get the H8
to power-on at 10 MHz, and to boot from the Z67-IDE at such frequency
as well.

Thanks,

Norberto

[Glenn Roberts]

Fantastic. Great work!

-----Original Message-----
From: se...@googlegroups.com [mailto:se...@googlegroups.com] On Behalf Of

Norby
Sent: Friday, May 04, 2012 1:50 AM
To: SEBHC
Subject: [sebhc] Re: Z67-IDE+

[jmcg...@windstream.net]

Awesome! Just when I think that I've seen it all for the H8 you come out
with something else even more amazing.