However,, has anybody a pointer to an equivalent circuit based on an op-amp
matrix ? The plan is then to synchronously demodulate the 3 derrived
phases, filter them and feed them into a trio of zero volt referenced
comparators. Et voila - simulated hall effect outputs from a resolver based
brushless motor.
Tim
From Sine and Cosine inputs, the X, Y, and Z synchro outputs are
Z = Cosine/sqrt(3)
Y = (Sine - Z)/2
X = -(Sine + Z)/2
1/sqrt(3) can be approximated to better than .01% by 56/97 or 153/265.
A voltage divider made of standard 1% values such as 10k and 13.7k will
give a nominal gain of 1/sqrt(3) within about .13%.