synchronous nastiness
John Larkin
One of my Young Engineers (actually, relatively, they are all Young
Engineers) designed a neat little logic fanout box, full of ecl and
gaasfets and stuff. It runs on a +12 wall-wart and has a bunch of
switchers inside to make the myriad + and - voltages that things like
this use.
Two of the switchers use a chip new to us, National LM3102, a nice
buck synchronous switcher, to step the +12 down to +8 and +2.5.
Problem: opamps clear on the other side of the board are showing huge
amounts of spike noise, correlated with the switcher frequencies. The
opamp layouts are very tight and no switcher stuff is anywhere close.
YE came to me for an opinion, and we played with it some, and it made
no sense. After thinking it over, I suggested that the fets in the
switchers were RF oscillating during their transitions, and the RF was
being rectified by the LM7301 bipolar opamps.
That idea was weird, but not weird enough. This is what's actually
happening at the switcher output node, just before the output
inductor:
ftp://66.117.156.8/SwitcherRise.JPG
Note the roughly 1.5 ns rise time, and the 150 MHz ringing. That's
equivalent to an RF burst plenty bad enough to get into the opamp
front ends.
OK, here's today's puzzler:
1. What's happening?
2. How to fix it?
John
Jim Thompson
On Sat, 04 Oct 2008 09:22:41 -0700, John Larkin
<jjla...@highNOTlandTHIStechnologyPART.com> wrote:
>
>
>One of my Young Engineers (actually, relatively, they are all Young
>Engineers)
Aren't they all ?:-)
Kill the "Q" of the inductor?
I'm very leery of these modern switcher architectures, playing insane
games to reduce external component sizes.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine Sometimes I even put it in the food
Tim Wescott
If the switcher is operating at only a few MHz (my brain cramps when I
say "only a few MHz" about a switcher, and I'm not all _that_ old) then
it shouldn't take much to do this.
--
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html
Jim Thompson
On Sat, 04 Oct 2008 09:41:46 -0700, Tim Wescott <t...@seemywebsite.com>
wrote:
Back when I was designing off-line switchers for GenRad, I rarely
operated above 25KHz ;-)
Back then we were more interested in heat inside the portable
equipment rather than size or weight (*)
(*) Most hilarious moment for my technicians was when I grabbed the
flag on a TO-220 transistor to see how "hot" it was. Since I had
heavily snubbed everything, I didn't even need heatsinks. However I
had forgotten about the 340V P-P on the flag... that'll really ring
your chime ;-)
John Larkin
The inductor (15 uH) isn't the bad guy... not at 150 MHz! And the
rising edge + ring is so brutal that it laughs at/fries RC dampers.
>>>
>>> I'm very leery of these modern switcher architectures, playing insane
>>> games to reduce external component sizes.
>>>
>>> ...Jim Thompson
>>
>>If the switcher is operating at only a few MHz (my brain cramps when I
>>say "only a few MHz" about a switcher, and I'm not all _that_ old) then
>>it shouldn't take much to do this.
>
>Back when I was designing off-line switchers for GenRad, I rarely
>operated above 25KHz ;-)
My first switcher used a 709 opamp as a combined error amp/pwm
generator, and a 2N2905+2N3055 pseudo-PNP as the switch. The 3055
didn't quite saturate, so was fast enough. It ran at 23 KHz, since I
could hear 22K in those days.
John
Jamie
parasitic noise, use some low value R's between the stages.
Lowering the Q should take care of that.
that's just an opinion of course. :)
qrk
<jjla...@highNOTlandTHIStechnologyPART.com> wrote:
How's the pcb layout? I've found that pcb layout is pretty important
around the switchers I've done and seen. Loop area is really important
with these high freq switchers. This is one area where isolation of
ground is important to keep the nasty currents from spreading into
other circuitry. I also like placing a ferrite bead on the output of
the power supply before it fans out to additional circuitry if its
feeding analog stuff (feedback connection is on the power supply side
of the bead).
Mark
The Phantom
<jjla...@highNOTlandTHIStechnologyPART.com> wrote:
An Amobead will probably fix it:
http://www.toshiba-tmat.co.jp/tmat/eng/list/am_am.htm
Look at some of the pdf's at the bottom of the page for examples of what an
Amobead will do for you.
>
>John
>
>
>
Nico Coesel
>
>
>One of my Young Engineers (actually, relatively, they are all Young
>Engineers) designed a neat little logic fanout box, full of ecl and
>gaasfets and stuff. It runs on a +12 wall-wart and has a bunch of
>switchers inside to make the myriad + and - voltages that things like
>this use.
>
>Two of the switchers use a chip new to us, National LM3102, a nice
>buck synchronous switcher, to step the +12 down to +8 and +2.5.
>
>Problem: opamps clear on the other side of the board are showing huge
>amounts of spike noise, correlated with the switcher frequencies. The
>opamp layouts are very tight and no switcher stuff is anywhere close.
>
>YE came to me for an opinion, and we played with it some, and it made
>no sense. After thinking it over, I suggested that the fets in the
>switchers were RF oscillating during their transitions, and the RF was
>being rectified by the LM7301 bipolar opamps.
Try to put a small resistor in series with the boost capacitor.
Doesn't make sense but it fixed an EMC problem for me.
--
Programmeren in Almere?
E-mail naar nico@nctdevpuntnl (punt=.)
HarryD
"John Larkin" <jjla...@highNOTlandTHIStechnologyPART.com> wrote in message
news:205fe4pqi3mdjf8b2...@4ax.com...
PGND to Cout) is getting nasty and oscillating with the node capacity at the
SW output.
2, First try a 100nF cap from the high side of Cout to the PGND pin. This
loop must be as short as possible. Now take a new picture of ringing to see
where we are, a snubber from SW to Cout will be added next.
Cheers,
Harry
>
>
John Larkin
wrote:
It's the upper fet turn on that has the nasties; the falling edge is
well-behaved. At the speed of the rise and ring, the 15 uH output
inductor is an open circuit, so there's no dramatic current flowing
into Cout.
I'm figuring there's 10's of amps flowing somewhere, in the ballpark
of 1e10 amps/second.
>
> 2, First try a 100nF cap from the high side of Cout to the PGND pin. This
>loop must be as short as possible. Now take a new picture of ringing to see
>where we are, a snubber from SW to Cout will be added next.
> Cheers,
>
> Harry
>
>>
>>
We tried snubbing. The spike is so big, and the equivalent node
impedance so low, that any snubber that even partially damps the
ringing fries its resistor.
That's not the answer.
John
HarryD
"John Larkin" <jjla...@highNOTlandTHIStechnologyPART.com> wrote in message
Ok, ok, I see your bottom side FET turned off for about 15nS before the
top side turned on and started to pour current into that node charging up
the parasitic capacity and supplying inductor current. When the inductor
current is satisfied, the topside parasitic inductance gets nasty and keeps
supplying current, overcharging the node capacity. The parasitic inductance
is in the top side because the topside parasitic diode never turns on, it is
isolated from the input cap by this inductance.
>
> I'm figuring there's 10's of amps flowing somewhere, in the ballpark
> of 1e10 amps/second.
>
>>
>> 2, First try a 100nF cap from the high side of Cout to the PGND pin. This
>>loop must be as short as possible. Now take a new picture of ringing to
>>see
>>where we are, a snubber from SW to Cout will be added next.
>> Cheers,
>>
>> Harry
>>
>>>
>>>
>
> We tried snubbing. The spike is so big, and the equivalent node
> impedance so low, that any snubber that even partially damps the
> ringing fries its resistor.
>
> That's not the answer.
Answer, slow down that topside turn on to > 0.35/150MHz => 2.4nS
>
> John
>
>
>
Joerg
Bypass the BJT inputs of the opamps. A few ten picofarads from IN+ to
IN-, SMT bead right in front of each. If you want to be extra good use
one of those Murata T-filters. Small, SMT, cheap. If it's really, really
nasty you'll need a piece of copper tape over each opamp with a short
tie to the ground plane.
BTDT. In our case cell phones were causing the grief, especially the GSM
kind. Try it out, ask around who has an AT&T GSM phone (not iPhone) or
T-Mobile. Then turn it on while holding it right next to the box.
Blackberries also pack quite a punch.
Using CMOS opamps helps a lot but sometimes there justa ren't any that
fit the bill.
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
John Larkin
wrote:
Two points:
1. It's inside the IC, so I can't slow it down.
2. The fet isn't turning on fast enough to make that rise.
John
Jamie
How about a different inductor using a much lower Q core at
the present switching freq?
Also, one could implement a notch filter via a series LC at
that point tailored for the ringing freq.
Another thought, placing a series RC in parallel with the inductor
to off shift the ringing freq to something much lower. The R would
lessen the Q on the over all. That's just a thought.
I've dealt with this issues before, inductor design has a lot to do
with it.
We have 100 KC hot cathode oscillator tubes systems which drive a
rectifier stack in a SF6 gas pressured vessel that houses a rectifier
multiplier stack to give us ~ 1.5 M volts of DC at the other end.
The inductor on the plate of this OSC tube is a multi wound
segmented type. This is done to prevent unwanted artifacts from
developing due to parasitic LC in the coil construction of a large body
type. So this unit has multiples of smaller inductors in series to
form a single unit.
John Larkin
This is what's going on:
ftp://66.117.156.8/SwitcherRise.JPG
For the first 15 ns, the lower fet of the synchronous switcher is on.
The output voltage is about -0.5 volts, roughly, which is Rds-on of
the lower fet times the load current. In preparation for turning on
the upper fet, the chip switches the lower fet off for the next 20 ns.
Now the load current is flowing through a pn junction diode internal
to the chip, essentially the substrate diode of the lower fet. That
has a drop of about 1 volt. The 20 ns of both-fets-off time is
intended to make sure they don't generate a huge shoot-thru current.
But when the upper fet turns on, at 35 ns, the substrate diode
reverse-conducts, and a huge current flows through the upper fet
through the diode to ground. After about 5 ns of reverse conduction,
the diode snaps off, and the output zooms up. It's acting like a
step-recovery diode, or maybe even a Grekhov DSRD. This huge current
winds up the chip's wirebond and lead inductance, which is what's
ringing. The waveform is classic.
Two fixes:
Add an external schottky diode to clamp the output at -0.5 or so, so
the slow PN diode doesn't turn on.
and/or
Replace the bipolar opamps with fet amps, which are less eager to
rectify RF.
National should have done something about this. Used a schottky if
possible, or a soft-recovery diode, or warned people to add an
external schottky.
John
Paul Hovnanian P.E.
It doesn't take much C to resonate at 150 MHz (0.075 pF). If the energy
is that high, you'd see high currents circulating (and heating things
up) between the inductor and the mystery C.....
...unless the C is in the inductor itself. Parasitic capacitance between
the windings perhaps?
--
Paul Hovnanian mailto:Pa...@Hovnanian.com
------------------------------------------------------------------
The opinions stated herein are the sole property of the author. All
rights
reserved. Void where prohibited. For external use only. Standard
disclaimers
apply. If irritation, rash or swelling occurs, discontinue use
immediately
and consult a physician.
boB
If this is what I think it is, the amo beads would most likely fix it,
but you don't have direct access to the FET drain or source leads so
I guess that ain't gonna work...
Another trick is to slow down the turn on of that top FET. You don't
have direct access to its gate, but you sort of do by way of the
bottstrap capacitor, Cbst.
Try adding a series resistor to Cbst of a few Ohms to sort of
accomplish the same thing since it's the only available access point.
I saw this in some application note or something somewhere so it isn't
something I just thought of.
boB
Jon Slaughter
"John Larkin" <jjla...@highNOTlandTHIStechnologyPART.com> wrote in message
If they did that then they couldn't get you to pay them for tech support!
boB
This is sorta 'related' to your problem...
http://www.irf.com/technical-info/whitepaper/syncbuckturnon.pdf
Page 5 shows the fix I believe, which, with that part would have to be
implemented with a resistor in series with the bootstrap cap. (and
the diode too maybe)
boB
Bill Sloman
"John Larkin" <jjla...@highNOTlandTHIStechnologyPART.com> schreef in
bericht news:gf8ge490rps2dv86u...@4ax.com...
>
> This is what's going on:
>
> ftp://66.117.156.8/SwitcherRise.JPG
>
> For the first 15 ns, the lower fet of the synchronous switcher is on.
> The output voltage is about -0.5 volts, roughly, which is Rds-on of
> the lower fet times the load current. In preparation for turning on
> the upper fet, the chip switches the lower fet off for the next 20 ns.
> Now the load current is flowing through a pn junction diode internal
> to the chip, essentially the substrate diode of the lower fet. That
> has a drop of about 1 volt. The 20 ns of both-fets-off time is
> intended to make sure they don't generate a huge shoot-thru current.
>
> But when the upper fet turns on, at 35 ns, the substrate diode
> reverse-conducts, and a huge current flows through the upper fet
> through the diode to ground. After about 5 ns of reverse conduction,
> the diode snaps off, and the output zooms up. It's acting like a
> step-recovery diode, or maybe even a Grekhov DSRD. This huge current
> winds up the chip's wirebond and lead inductance, which is what's
> ringing. The waveform is classic.
>
> Two fixes:
>
> Add an external schottky diode to clamp the output at -0.5 or so, so
> the slow PN diode doesn't turn on.
>
> and/or
>
> Replace the bipolar opamps with fet amps, which are less eager to
> rectify RF.
They both rectify RF if there is enough of it, but FET inputs stay linear
for excursions of up to about a volt, while bipolar input go non-linear for
excursions over about 20mV.
> National should have done something about this. Used a schottky if
> possible, or a soft-recovery diode, or warned people to add an
> external schottky.
But what would National Semiconductors engineers know about "snap off" in
step-recovery diodes?
You and I both know about them because we've had to make narrow pulses with
very steep transitions, but this isn't called for in routine semiconductor
design - Google can't find a single post from Jim Thompson that includes the
string "step recovery". Masters of the craft might do better but similar
searches on Barry Gilbert and Bob Widlar also come up empty.
--
Bill Sloman, Nijmegen
Joerg
At the end of the day the $64000 question will be: Does it pass EMC?
Joerg
Drill a hole and put a drop of muriatic acid in it :-)
That ought to slow it down ...
To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
stuff, it can eat a whole into concrete.
--
SCNR, Joerg
Jim Thompson
On Sun, 05 Oct 2008 14:20:55 -0700, Joerg
<notthis...@removethispacbell.net> wrote:
>John Larkin wrote:
[snip]
>>
>> 1. It's inside the IC, so I can't slow it down.
>>
>
>Drill a hole and put a drop of muriatic acid in it :-)
>
>That ought to slow it down ...
>
>To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
>stuff, it can eat a whole into concrete.
Yep, it could do that, or maybe eat a HOLE into it ;-)
krw
notthis...@removethispacbell.net says...
Will it eat the hole IC too?
--
Keith
Joerg
> On Sun, 05 Oct 2008 14:20:55 -0700, Joerg
> <notthis...@removethispacbell.net> wrote:
>
>> John Larkin wrote:
> [snip]
>>> 1. It's inside the IC, so I can't slow it down.
>>>
>> Drill a hole and put a drop of muriatic acid in it :-)
>>
>> That ought to slow it down ...
>>
>> To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
>> stuff, it can eat a whole into concrete.
>
> Yep, it could do that, or maybe eat a HOLE into it ;-)
>
Oops ...
Well, I talked German most of the morning. Out of roughly 130 people at
church service there were ten (!) Teutons. Quite unusual for this area.
--
Regards, Joerg
Joerg
Ya sure, ya betcha, da hool IC :-)
--
Regards, Joerg
Jim Thompson
Probably ;-)
Tim Williams
>
> > To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
> > stuff, it can eat a whole into concrete.
>
> Will it eat the hole IC too?
Will it eat the IC's electrons after it's done with the holes?
Tim
The Phantom
That's what I get for not looking at the LM3102 data sheet. I just figured it
used an external FET. :-(
krw
25g2000hsk.googlegroups.com>, tmor...@gmail.com says...
You misspelled "welectrons".
--
Keith
Tim Williams
> > Will it eat the IC's electrons after it's done with the holes?
>
> You misspelled "welectrons".
I don't think so? Google only gives 207 hits for "welectrons", most
of them academic, curiously (I suppose I could be missing a subscript
in there). I've not encountered the term before.
Tim
legg
The addition of external diodes may be ineffective, as diverting
current flow from one loop to another, under the influence of only a
few 100mV of diode forward voltage differential, will be impractical
in the time frame available.
Reducing turn-on speed of the upper fet is effected through an
increase in gate drive source impedance, by placing impedances in the
drive source's supply - the boost cap - as is suggested elsewhere.
RL
Frank Raffaeli
I recently had the same problem, only the ringing frequency was 200
MHz. The topside FET oscillates well into it's conduction cycle. These
newfangled efficient, fast FETs and N-channel charge pump controller
drivers are the culprit. The waveform you captured looks familiar.
It helps to look at the switcher like a Colpitts oscillator. The
bottom FET, as it's turning off and losing charge looks like a
capacitor. In addition to the parasitics between the switch node and
ground, and in concert with the source-to-drain capacitance of the
topside FET, you get the classic capacitor divider of the Colpitts.
The inductor is formed in the few nH of inductance between the gate of
the topside FET and the controller output. The successful solution
involved one or more of three methods (We did 1 and 3)
1) fatten up the PCB trace from the controller to the FET: also keep
it short (a few mm) to lower the inductance as much as possible
2) Use a very low inductance R-C (or R-L-C) snubber at the input to
the Topside FET. This will reduce the amplitude and Q of the feedback
network. OK if you can trade-off with efficiency.
3) add a *low* inductance R-C snubber to the switch node: try 10 ohms
and 100pF (0603 or smaller, 2-3 mm wide trace)
Frank
Jasen Betts
>> Drill a hole and put a drop of muriatic acid in it :-)
>>
>> That ought to slow it down ...
>>
>> To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
>> stuff, it can eat a whole into concrete.
>
> Will it eat the hole IC too?
any exposed aluminium will gone in a flash,
it won't eat the gold, copper(much) or exposed silicon.
it takes nitric acid to disolve copper, aqua regia to dissolve gold, and
some really nasty chemicals to disolve silicon.
the acid only attacks the cement in concrete the agregate (sand and
gravel) will be left behind.
Bye.
Jasen
JosephKK
>On 2008-10-05, krw <k...@att.bizzzzzzzzzz> wrote:
>
>>> Drill a hole and put a drop of muriatic acid in it :-)
>>>
>>> That ought to slow it down ...
>>>
>>> To the uninitiated: DON'T DO THAT! Muriatic acid is about the worst
>>> stuff, it can eat a whole into concrete.
>>
>> Will it eat the hole IC too?
>
>any exposed aluminium will gone in a flash,
>it won't eat the gold, copper(much) or exposed silicon.
>
>it takes nitric acid to disolve copper,
The mother of acids (sulfuric) will dissolve copper quite fine.
Hydrochloric not so much, but it will.
> aqua regia to dissolve gold, and
>some really nasty chemicals to disolve silicon.
If you want fast rates, flourboric acid (BF3) buffered with
hydroflouric acid does quite nice.
>
>the acid only attacks the cement in concrete the agregate (sand and
>gravel) will be left behind.
>
>Bye.
> Jasen
Actually it will attack most sedimentary rocks, some igneous rock and
will weather metamorphic rock. It won't bother sand much.
Jeff L
"John Larkin" <jjla...@highNOTlandTHIStechnologyPART.com> wrote in message
>
> This is what's going on:
>
> ftp://66.117.156.8/SwitcherRise.JPG
>
> For the first 15 ns, the lower fet of the synchronous switcher is on.
> The output voltage is about -0.5 volts, roughly, which is Rds-on of
> the lower fet times the load current. In preparation for turning on
> the upper fet, the chip switches the lower fet off for the next 20 ns.
> Now the load current is flowing through a pn junction diode internal
> to the chip, essentially the substrate diode of the lower fet. That
> has a drop of about 1 volt. The 20 ns of both-fets-off time is
> intended to make sure they don't generate a huge shoot-thru current.
>
> But when the upper fet turns on, at 35 ns, the substrate diode
> reverse-conducts, and a huge current flows through the upper fet
> through the diode to ground. After about 5 ns of reverse conduction,
> the diode snaps off, and the output zooms up. It's acting like a
> step-recovery diode, or maybe even a Grekhov DSRD. This huge current
> winds up the chip's wirebond and lead inductance, which is what's
> ringing. The waveform is classic.
>
> Two fixes:
>
> Add an external schottky diode to clamp the output at -0.5 or so, so
> the slow PN diode doesn't turn on.
I came to this thread late, but
This is a very common problem in synchro switchers - Don't let that slow
body diode turn on! Paralleling with a lower Vf schottky fixes the problem.
There are some IC's designed for external FET's that claim adaptive shoot
through protection that may time the fets well enough that this is not a
problem. I think there are also MOSFETs available that have a built in
schottky diode, however, I have not used them, and wouldn't help with your
problem, since the fet is internal to the IC. Most of the switchers I design
start at 50+ watts, and I always include the schottky diode.
>
> and/or
>
> Replace the bipolar opamps with fet amps, which are less eager to
> rectify RF.
>
>
> National should have done something about this. Used a schottky if
> possible, or a soft-recovery diode, or warned people to add an
> external schottky.
Your right - there should be a built in schottky (can they be produced in a
standard cmos process???), or a least a warning to use a external schottky,
but that would mean a higher parts count for a simple switcher, which would
make it less attractive to small = better and cost conscious buyers.
It's also not the first chip to have very serious issues from major vendors.
Stuff like code not executing as documented in some processors, low voltage
/ low power quad OP amps getting strange offsets below a certain temperature
threshold (like -20 deg C) (vendor admitted problem!), 30 db variance in
sensitivity of RF FSK demodulator, etc
>
>
> John
>
>
Jeff L
"legg" <le...@nospam.magma.ca> wrote in message
news:k1dne4luj7j1g03iv...@4ax.com...
This can fix the problem, but will drop the efficiency of the power supply.
The efficiency drop might be significant at those frequencies. Not likely a
problem in John's case, since the unit is bench powered, unless the power
dissipation in the chip becomes too much.
>
> RL
boB
wrote:
I have found that this can also ~increase~ the efficiency of the power
supply by lowering the losses from this particular mechanism problem.
boB