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Regulator minimum capacitor ESR
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Mr.CRC
Feb 8, 2012, 11:58:17 PM2/8/12
to
Greetings,
I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
deploy ceramic caps rather than Ta, since it's less trouble fussing with
CAD libraries, making sure the parts I can order fit the pads, etc., or
rather than building my own Ta cap lib.
The point is, the LDO wants a min ESR of about 50 milliohms, but a
parallel combo of many ceramic caps is likely to be lower than this.
Is it Ok to put a resistor at the LDO output terminal to add ESR there?
The weird thing about this, of course, is that the load would be on the
other side of the resistor, which isn't great. OTOH, the load is still
connected to the low ESR capacitance, which is good.
Anyway, it's easier to add the resistor there, rather than in series
with the caps, or spend a few more hours switching to Ta caps, which may
still have too little ESR with many in ||.
--
_____________________
Mr.CRC
crobc...@REMOVETHISsbcglobal.net
SuSE 10.3 Linux 2.6.22.17
I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
deploy ceramic caps rather than Ta, since it's less trouble fussing with
CAD libraries, making sure the parts I can order fit the pads, etc., or
rather than building my own Ta cap lib.
The point is, the LDO wants a min ESR of about 50 milliohms, but a
parallel combo of many ceramic caps is likely to be lower than this.
Is it Ok to put a resistor at the LDO output terminal to add ESR there?
The weird thing about this, of course, is that the load would be on the
other side of the resistor, which isn't great. OTOH, the load is still
connected to the low ESR capacitance, which is good.
Anyway, it's easier to add the resistor there, rather than in series
with the caps, or spend a few more hours switching to Ta caps, which may
still have too little ESR with many in ||.
--
_____________________
Mr.CRC
crobc...@REMOVETHISsbcglobal.net
SuSE 10.3 Linux 2.6.22.17
Tim Wescott
Feb 9, 2012, 1:31:58 AM2/9/12
to
you propose is OK. Weird, but unless that DSP is sucking way more
current than I think, OK.
--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?
Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
Tim Wescott
Feb 9, 2012, 1:33:13 AM2/9/12
to
On Thu, 09 Feb 2012 00:31:58 -0600, Tim Wescott wrote:
> On Wed, 08 Feb 2012 20:58:17 -0800, Mr.CRC wrote:
>
>> Greetings,
>>
>> I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
>> deploy ceramic caps rather than Ta, since it's less trouble fussing
>> with CAD libraries, making sure the parts I can order fit the pads,
>> etc., or rather than building my own Ta cap lib.
>>
>> The point is, the LDO wants a min ESR of about 50 milliohms, but a
>> parallel combo of many ceramic caps is likely to be lower than this.
>>
>> Is it Ok to put a resistor at the LDO output terminal to add ESR there?
>> The weird thing about this, of course, is that the load would be on
>> the
>> other side of the resistor, which isn't great. OTOH, the load is still
>> connected to the low ESR capacitance, which is good.
>>
>> Anyway, it's easier to add the resistor there, rather than in series
>> with the caps, or spend a few more hours switching to Ta caps, which
>> may still have too little ESR with many in ||.
>
> For regulator stability I'm pretty sure that putting the resistor where
> you propose is OK. Weird, but unless that DSP is sucking way more
> current than I think, OK.
Besides, I heard from a customer that the Great Tantalum Capacitor
> On Wed, 08 Feb 2012 20:58:17 -0800, Mr.CRC wrote:
>
>> Greetings,
>>
>> I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
>> deploy ceramic caps rather than Ta, since it's less trouble fussing
>> with CAD libraries, making sure the parts I can order fit the pads,
>> etc., or rather than building my own Ta cap lib.
>>
>> The point is, the LDO wants a min ESR of about 50 milliohms, but a
>> parallel combo of many ceramic caps is likely to be lower than this.
>>
>> Is it Ok to put a resistor at the LDO output terminal to add ESR there?
>> The weird thing about this, of course, is that the load would be on
>> the
>> other side of the resistor, which isn't great. OTOH, the load is still
>> connected to the low ESR capacitance, which is good.
>>
>> Anyway, it's easier to add the resistor there, rather than in series
>> with the caps, or spend a few more hours switching to Ta caps, which
>> may still have too little ESR with many in ||.
>
> For regulator stability I'm pretty sure that putting the resistor where
> you propose is OK. Weird, but unless that DSP is sucking way more
> current than I think, OK.
Shortage is back on. I haven't checked news sources (or distributor
stock) to verify, though.
Nico Coesel
Feb 9, 2012, 6:50:10 AM2/9/12
to
"Mr.CRC" <crobc...@REMOVETHISsbcglobal.net> wrote:
>Greetings,
>
>I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
>deploy ceramic caps rather than Ta, since it's less trouble fussing with
>CAD libraries, making sure the parts I can order fit the pads, etc., or
>rather than building my own Ta cap lib.
>
>The point is, the LDO wants a min ESR of about 50 milliohms, but a
>parallel combo of many ceramic caps is likely to be lower than this.
>
>Is it Ok to put a resistor at the LDO output terminal to add ESR there?
> The weird thing about this, of course, is that the load would be on the
>other side of the resistor, which isn't great. OTOH, the load is still
>connected to the low ESR capacitance, which is good.
In these cases I connect the load directly to the LDO and put a
>Greetings,
>
>I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
>deploy ceramic caps rather than Ta, since it's less trouble fussing with
>CAD libraries, making sure the parts I can order fit the pads, etc., or
>rather than building my own Ta cap lib.
>
>The point is, the LDO wants a min ESR of about 50 milliohms, but a
>parallel combo of many ceramic caps is likely to be lower than this.
>
>Is it Ok to put a resistor at the LDO output terminal to add ESR there?
> The weird thing about this, of course, is that the load would be on the
>other side of the resistor, which isn't great. OTOH, the load is still
>connected to the low ESR capacitance, which is good.
resistor in series with a 10uf capacitor close to the LDO. Having
ceramics further downstream doesn't seem to hurt.
--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Fred Bloggs
Feb 10, 2012, 2:36:10 PM2/10/12
to
On Feb 8, 11:58 pm, "Mr.CRC" <crobcBO...@REMOVETHISsbcglobal.net>
wrote:
Your placement degrades DC regulation more or less depending on load
current. Something like this would be more in line with reality:
Please view in a fixed-width font such as
Courier.
.
.
.
.
. ---------
. |
. |
. OUT|-----------+------------->
. | |
. | [0.06R]
. REG | |
. | ---------------
. | | | | |
. | === === === ===
. | | C | C | C | C
. --------- ---------------
. | |
. | |
. -----+----------------+------------->
. |
. ---
. ///
.
.
.
.
.
.
wrote:
current. Something like this would be more in line with reality:
Please view in a fixed-width font such as
Courier.
.
.
.
.
. ---------
. |
. |
. OUT|-----------+------------->
. | |
. | [0.06R]
. REG | |
. | ---------------
. | | | | |
. | === === === ===
. | | C | C | C | C
. --------- ---------------
. | |
. | |
. -----+----------------+------------->
. |
. ---
. ///
.
.
.
.
.
.
Jon Elson
Feb 11, 2012, 12:10:32 AM2/11/12
to
Mr.CRC wrote:
> Greetings,
>
> I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
> deploy ceramic caps rather than Ta, since it's less trouble fussing with
> CAD libraries, making sure the parts I can order fit the pads, etc., or
> rather than building my own Ta cap lib.
>
> The point is, the LDO wants a min ESR of about 50 milliohms, but a
> parallel combo of many ceramic caps is likely to be lower than this.
>
> Is it Ok to put a resistor at the LDO output terminal to add ESR there?
> The weird thing about this, of course, is that the load would be on the
> other side of the resistor, which isn't great. OTOH, the load is still
> connected to the low ESR capacitance, which is good.
>
50 mOhm is NOT a lot of resistance. Unless ALL the ceramic caps are
> Greetings,
>
> I'll be using a TI TPS767D301 LDO to power my DSP. I find it easier to
> deploy ceramic caps rather than Ta, since it's less trouble fussing with
> CAD libraries, making sure the parts I can order fit the pads, etc., or
> rather than building my own Ta cap lib.
>
> The point is, the LDO wants a min ESR of about 50 milliohms, but a
> parallel combo of many ceramic caps is likely to be lower than this.
>
> Is it Ok to put a resistor at the LDO output terminal to add ESR there?
> The weird thing about this, of course, is that the load would be on the
> other side of the resistor, which isn't great. OTOH, the load is still
> connected to the low ESR capacitance, which is good.
>
RIGHT next to the regulator, I doubt you will have any problem.
If most of the ceramics are at the load chips, the distributed
resistance to those caps can be enough. Possibly an inch or so
of modest circuit trace from the regulator would be 50 mOhm.
Jon
Mr.CRC
Feb 11, 2012, 12:29:43 AM2/11/12
to
gang like that.
But I still worry about all the other little 0.01-0.1uF guys sprinkled
around paralleling to less than 50 milliohms.
Fred Bloggs
Feb 11, 2012, 5:12:39 PM2/11/12
to
On Feb 11, 12:29 am, "Mr.CRC" <crobcBO...@REMOVETHISsbcglobal.net>
wrote:
> crobcBO...@REMOVETHISsbcglobal.net
> SuSE 10.3 Linux 2.6.22.17- Hide quoted text -
>
> - Show quoted text -
Actually you bring up a good point about the other decoupling caps
sprinkled around. This actually strengthens the argument for keeping
that series 0.06R + bulk caps in shunt with the load as recommended.
The reasoning is as follows: the regulator does not even see the
loading of the other decoupling caps except at higher frequency, and
at the higher frequencies the ESR + bulk caps combination looks like a
simple ESR alone, then the phase shift of the decoupling caps only
comes into full effect when their combined reactance equals the ESR,
which is to say when the high frequency output current splits evenly
between the ESR and small decoupling caps. Typically the properly
compensated LDO will have an open loop crossover 0dB frequency of 10's
of KHz, so to be conservative, you can limit the total decoupling
capacitance to be such that the combined reactance does not equal the
ESR until say 1 MHz or so. Then the induced phase shift will not occur
until the loop gain is well below 0dB ( like -40dB) and stability is
not corrupted. Numerically this is expressed as ESR=1/
(2*pi*freq*Ccplg) or maximum Ccplg= 1/(2*pi*freq*ESR)= 2,6uF ( for
ESR=0.06 as recommended and freq=1MHz). This is a very generous
allotment of 0.01u decoupling caps- about 260 of them!
Another word of caution is to back off that excessively large filter
cap and use the 10u recommended. Too large a bypass cap is as bad as
too high an ESR for stability purposes. Use the recommended 10u.
wrote:
> SuSE 10.3 Linux 2.6.22.17- Hide quoted text -
>
> - Show quoted text -
Actually you bring up a good point about the other decoupling caps
sprinkled around. This actually strengthens the argument for keeping
that series 0.06R + bulk caps in shunt with the load as recommended.
The reasoning is as follows: the regulator does not even see the
loading of the other decoupling caps except at higher frequency, and
at the higher frequencies the ESR + bulk caps combination looks like a
simple ESR alone, then the phase shift of the decoupling caps only
comes into full effect when their combined reactance equals the ESR,
which is to say when the high frequency output current splits evenly
between the ESR and small decoupling caps. Typically the properly
compensated LDO will have an open loop crossover 0dB frequency of 10's
of KHz, so to be conservative, you can limit the total decoupling
capacitance to be such that the combined reactance does not equal the
ESR until say 1 MHz or so. Then the induced phase shift will not occur
until the loop gain is well below 0dB ( like -40dB) and stability is
not corrupted. Numerically this is expressed as ESR=1/
(2*pi*freq*Ccplg) or maximum Ccplg= 1/(2*pi*freq*ESR)= 2,6uF ( for
ESR=0.06 as recommended and freq=1MHz). This is a very generous
allotment of 0.01u decoupling caps- about 260 of them!
Another word of caution is to back off that excessively large filter
cap and use the 10u recommended. Too large a bypass cap is as bad as
too high an ESR for stability purposes. Use the recommended 10u.
John S
Feb 11, 2012, 6:39:21 PM2/11/12
to
comments and don't worry.
Fred Bloggs
Feb 11, 2012, 7:52:59 PM2/11/12
to
> too high an ESR for stability purposes. Use the recommended 10u.-
The AVX ceramic X5R dielectric 10u at 10V has an upper limit ESR of .
5 ohm, so this would be right in the middle of your stability range,
no external R required. External bypass caps at the load you can
handle are now at 0.3uF total.
The AVX ceramic X5R dielectric 10u at 10V has an upper limit ESR of .
5 ohm, so this would be right in the middle of your stability range,
no external R required. External bypass caps at the load you can
handle are now at 0.3uF total.
Fred Bloggs
Feb 11, 2012, 7:55:31 PM2/11/12
to
>
> - Show quoted text -
That's not how that works.
> - Show quoted text -
John Larkin
Feb 11, 2012, 9:39:51 PM2/11/12
to
about 50 mohms.
--
John Larkin, President Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Fred Bloggs
Feb 11, 2012, 10:14:23 PM2/11/12
to
On Feb 11, 9:39 pm, John Larkin
> John Larkin, President Highland Technology Incwww.highlandtechnology.com jlarkin at highlandtechnology dot com
frequency above 300MHz. Sounds kind of absurd doesn't it? The
decoupling caps do not degrade the stability for the reason stated in
my post, they do not introduce phase shift of any significance within
the 0dB bandwidth of the feedback loop, there's no need for series
resistance, or even 1" traces all over the place, just put it down
wherever.
>
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom timing and laser controllers
> Photonics and fiberoptic TTL data links
> VME analog, thermocouple, LVDT, synchro, tachometer
> Multichannel arbitrary waveform generators- Hide quoted text -
> Precision electronic instrumentation
> Picosecond-resolution Digital Delay and Pulse generators
> Custom timing and laser controllers
> Photonics and fiberoptic TTL data links
> VME analog, thermocouple, LVDT, synchro, tachometer
>
> - Show quoted text -
Yep- but that in series with say a 0.01u decoupling cap has a corner
> - Show quoted text -
frequency above 300MHz. Sounds kind of absurd doesn't it? The
decoupling caps do not degrade the stability for the reason stated in
my post, they do not introduce phase shift of any significance within
the 0dB bandwidth of the feedback loop, there's no need for series
resistance, or even 1" traces all over the place, just put it down
wherever.
Mr.CRC
Feb 11, 2012, 11:00:53 PM2/11/12
to
> and
> at the higher frequencies the ESR + bulk caps combination looks like a
> simple ESR alone,
> then the phase shift of the decoupling caps only
> comes into full effect when their combined reactance equals the ESR,
> which is to say when the high frequency output current splits evenly
> between the ESR and small decoupling caps. Typically the properly
> compensated LDO will have an open loop crossover 0dB frequency of 10's
> of KHz,
> so to be conservative, you can limit the total decoupling
> capacitance to be such that the combined reactance does not equal the
> ESR until say 1 MHz or so.
>Then the induced phase shift will not occur
> until the loop gain is well below 0dB ( like -40dB) and stability is
> not corrupted. Numerically this is expressed as ESR=1/
> (2*pi*freq*Ccplg) or maximum Ccplg= 1/(2*pi*freq*ESR)= 2,6uF ( for
> ESR=0.06 as recommended and freq=1MHz). This is a very generous
> allotment of 0.01u decoupling caps- about 260 of them!
> Another word of caution is to back off that excessively large filter
> cap and use the 10u recommended. Too large a bypass cap is as bad as
> too high an ESR for stability purposes. Use the recommended 10u.
I doubt the DSP will have huge current surges, as I don't plan on
turning on/off major blocks of functionality in my application. Though,
I do want to design the board to be flexible enough to work with other
people's low-power apps.
So I think I'll put in locations for several caps, and just populate as
necessary. With a resistor option as well.
Mr.CRC
Feb 12, 2012, 12:41:42 AM2/12/12
to
distributed to a high pin-count chip via a solid Cu plane, so the
resistance can be very low.
All of the caps are thus effectively right at the regulator.
John Larkin
Feb 12, 2012, 1:17:21 AM2/12/12
to
But why don't you use a regulator that's happy with ceramic caps? Or
add a tantalum, which usually makes things happy?
Mr.CRC
Feb 12, 2012, 1:59:35 AM2/12/12
to
John Larkin wrote:
> If you wanted to add 50 mohms, a trace would do it.
>
> But why don't you use a regulator that's happy with ceramic caps? Or
> add a tantalum, which usually makes things happy?
The LDO is easy to use since it has the two supplies, one adjustable
> If you wanted to add 50 mohms, a trace would do it.
>
> But why don't you use a regulator that's happy with ceramic caps? Or
> add a tantalum, which usually makes things happy?
(needed to get 1.9V for full speed 150MHz clock), with reset timeout.
Combined with another supervisor chip, it can perfectly sequence the
power for the TMS320F2812 with every detail as required.
It is easier to make the TPS767D301 happy than research and deploy
another dual LDO.
Even switching to some Ta or good Al caps wouldn't be hard. I'll just
make some cap footprints that can fit anything.
k...@att.bizzzzzzzzzzzz
Feb 12, 2012, 11:30:11 AM2/12/12
to
On Sat, 11 Feb 2012 22:59:35 -0800, "Mr.CRC"
<crobc...@REMOVETHISsbcglobal.net> wrote:
>John Larkin wrote:
>> If you wanted to add 50 mohms, a trace would do it.
>>
>> But why don't you use a regulator that's happy with ceramic caps? Or
>> add a tantalum, which usually makes things happy?
>
>
>The LDO is easy to use since it has the two supplies, one adjustable
>(needed to get 1.9V for full speed 150MHz clock), with reset timeout.
OK, why don't you use an LDO that's happy with ceramic parts?
<crobc...@REMOVETHISsbcglobal.net> wrote:
>John Larkin wrote:
>> If you wanted to add 50 mohms, a trace would do it.
>>
>> But why don't you use a regulator that's happy with ceramic caps? Or
>> add a tantalum, which usually makes things happy?
>
>
>The LDO is easy to use since it has the two supplies, one adjustable
>(needed to get 1.9V for full speed 150MHz clock), with reset timeout.
>Combined with another supervisor chip, it can perfectly sequence the
>power for the TMS320F2812 with every detail as required.
>It is easier to make the TPS767D301 happy than research and deploy
>another dual LDO.
>Even switching to some Ta or good Al caps wouldn't be hard. I'll just
>make some cap footprints that can fit anything.
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