25MHz 2dBm sine wave to logic conversion
Andrew Holme
5V logic levels with very fast rise times and minimal noise / jitter.
At the moment, I'm increasing the level to about 10dBm using an MSA0404
MMIC, followed by a PNP differential-pair limiter (which is struggling
a bit at this frequency). I'm wondering about ditching the PNP diff
pair and replacing it with a SOT-23 single gate HCT Schmitt trigger.
Andrew Holme
Is there a good low-noise solution involving a broadband transformer
e.g. wound on a ferrite bead? How about ditching the MMIC and going
for a broadband step-up transformer, with load resistor, followed by
the HCT schmitt trigger?
Winfield Hill
>
> Andrew Holme wrote:
>> Can anyone suggest a good way to convert a 2dBm, 15-25 MHz
>> sine wave to 5V logic levels with very fast rise times and
>> minimal noise / jitter.
There are plenty of comparators that'll handle the task.
For example, in the older high-voltage realm, there's the
LT1016 and the TL3016. I also like the MAX903, which I'm
using for a similar job at 80MHz.
Or you could bias an unbuffered CMOS inverter into the
linear region, and ac-couple the signal to it. A second
inverter will sharpen the risetime.
--
Thanks,
- Win
John Larkin
wrote:
Use a fast comparator or, even better, a 5-volt LVDS line receiver.
For the LVDS, offset your sig to +2.5 volts and apply to the + input.
Feedback the output to the - input through a slowish R-C lowpass. That
will servo the input threshold such as to make a 50% output duty cycle
output. Shouldn't need the MMIC. Expect under 10 ps RMS jitter if your
input's that good.
Actually, you could probably get away with just applying your sig to
one input and grounding the other. The LVDS receivers seem to work
fine comparing around ground.
National, Fairchild, TI, ONsemi make LVDS receivers. They are fast and
cheap.
John
Fred Bloggs
No need to broadband with differential pair, and Schmitt trigger is the
last component you want to use for low jitter output. Lowest noise would
be 50 ohm input single transistor CE with reasonably high impedance
inductive load terminated in 2.5V ( a simple variant of broadbanded
video CE amp) driving logic buffer.
Joerg
> Or you could bias an unbuffered CMOS inverter into the
> linear region, and ac-couple the signal to it. A second
> inverter will sharpen the risetime.
Ah, my kind of stuff. It will burn a bit of quiescent power though since
he wants to reach 5V. 74HCU04 and the like can get pretty toasty.
Alternatively, Andrew could use a BFS17 or two to jazz up the amplitude
and then run it into an inverter.
BTW, some info on "not so digital" uses of HCU and other chips would be
nice for the next edition of AoE. And no, I am trying hard not to ask
again when it'll hit the book stores.
Regards, Joerg
Winfield Hill
>
> Hello Winfield,
>
>> Or you could bias an unbuffered CMOS inverter into the
>> linear region, and ac-couple the signal to it. A second
>> inverter will sharpen the risetime.
>
> Ah, my kind of stuff. It will burn a bit of quiescent power though
> since he wants to reach 5V. 74HCU04 and the like can get pretty toasty.
Only the power necessary to operate at 25MHz. A 250mV signal is more
than enough to drive the inverter out of class A.
> Alternatively, Andrew could use a BFS17 or two to jazz up the amplitude
> and then run it into an inverter.
>
> BTW, some info on "not so digital" uses of HCU and other chips would be
> nice for the next edition of AoE. And no, I am trying hard not to ask
> again when it'll hit the book stores.
Yes, we're putting in some cool stuff, like actual measured MOSFET
gate-voltage to drain-current transfer characteristics for the N-
and P-channel FETs in the unbuffered CMOS logic ICs, both for older
HC types and for the newer low-voltage CMOS processes. Want to know
the class-A current for different voltages? Read it off the plots.
--
Thanks,
- Win
Joerg
>>Ah, my kind of stuff. It will burn a bit of quiescent power though
>>since he wants to reach 5V. 74HCU04 and the like can get pretty toasty.
>
> Only the power necessary to operate at 25MHz. A 250mV signal is more
> than enough to drive the inverter out of class A.
Not really for the unbuffered devices. Look at figure 8:
http://www.semiconductors.philips.com/acrobat_download/datasheets/74HCU04_CNV_2.pdf
> Yes, we're putting in some cool stuff, like actual measured MOSFET
> gate-voltage to drain-current transfer characteristics for the N-
> and P-channel FETs in the unbuffered CMOS logic ICs, both for older
> HC types and for the newer low-voltage CMOS processes. Want to know
> the class-A current for different voltages? Read it off the plots.
That is great. One piece of info that would be nice is the min and max
specs on class A current. Data sheets like the one above only state
typical values and that is not quite enough information for a design
that goes into production.
Regards, Joerg
Winfield Hill
>
>Hello Winfield,
>
>>> Ah, my kind of stuff. It will burn a bit of quiescent power
>>> though since he wants to reach 5V. 74HCU04 and the like can
>>> get pretty toasty.
>>
>> Only the power necessary to operate at 25MHz. A 250mV signal
>> is more than enough to drive the inverter out of class A.
>
> Not really for the unbuffered devices. Look at figure 8:
> http://www.semiconductors.philips.com/acrobat_download/
> datasheets/74HCU04_CNV_2.pdf
With respect to my class-A argument, I stand corrected. As I
mentioned, we've taken considerable data, but I was going from
memory in making my remark. Looking at my supply-shoot-through
current curves, I see they're more like those shown by Philips.
However, note that the 11mA current we measured at 5V is only
60mW, which isn't that toasty. :>) Also, we measured 2mA at
3V and Philips shows 0.5mA at 2V, so the staggered-voltage trick
could be used to reduce the supply current.
>> Yes, we're putting in some cool stuff, like actual measured MOSFET
>> gate-voltage to drain-current transfer characteristics for the N-
>> and P-channel FETs in the unbuffered CMOS logic ICs, both for older
>> HC types and for the newer low-voltage CMOS processes. Want to know
>> the class-A current for different voltages? Read it off the plots.
>
> That is great. One piece of info that would be nice is the min and max
> specs on class A current. Data sheets like the one above only state
> typical values and that is not quite enough information for a design
> that goes into production.
Yes, it would be nice, but it's beyond what we'll be able to do
with our limited time and more importantly, limited sample set.
--
Thanks,
- Win
Joerg
> However, note that the 11mA current we measured at 5V is only
> 60mW, which isn't that toasty. :>) Also, we measured 2mA at
> 3V and Philips shows 0.5mA at 2V, so the staggered-voltage trick
> could be used to reduce the supply current.
Well, one of the newfangled TSSOP packs can get a bit hot. 2V would work
but the 74HCU04 becomes really slow then, unless you take newer faster
TI low voltage logic. More $$$ though.
I'd probably opt for a discrete design in this case.
>>That is great. One piece of info that would be nice is the min and max
>>specs on class A current. Data sheets like the one above only state
>>typical values and that is not quite enough information for a design
>>that goes into production.
>
> Yes, it would be nice, but it's beyond what we'll be able to do
> with our limited time and more importantly, limited sample set.
No, I didn't mean sampling at your lab. That's hard to do because you
may not be able to obtain the process extremes. But you could try to
cajole the process mins and maxes out of a manufacturer with good
specsmanship (but a sluggish website...) such as Philips. Your name
carries a lot more clout with it while us regular guys will usually be
turned down. Tried many times. Even the notion of the potential truck
loads in sales volume or a letter to the big brass doesn't sway them :-(
Thing is, the minute you are facing a regulated design history path, and
nowadays that's nearly all of my designs, the absence of hard data on
min and max ratings is usually the end of the road.
Regards, Joerg
Andrew Holme
Thanks Win, and everyone else, for the suggestions.
I've got an MM74HCU04N stuffed in a solderless breadboard - with all the
strays that entails - and it puts my old circuit to shame. Experimenting
with different feedback resistors, I'm seeing 80% rise times below 4ns on my
100 MHz 'scope with 22k and larger. Does this wonder solution have a
downside? I don't care about current consumption, but noise / jitter
matters. Is it fair to say the unbuffered HCU gates have less in them to
create noise?
I've also got an AD8561 comparator, which is billed as an "upgrade for
LT1016 designs", but I prefer the HCU solution.
Joerg
> I've got an MM74HCU04N stuffed in a solderless breadboard - with all the
> strays that entails - and it puts my old circuit to shame. Experimenting
> with different feedback resistors, I'm seeing 80% rise times below 4ns on my
> 100 MHz 'scope with 22k and larger. Does this wonder solution have a
> downside? I don't care about current consumption, but noise / jitter
> matters. Is it fair to say the unbuffered HCU gates have less in them to
> create noise?
Solderless breadboards give me the goose pimples. Wait until you see it
perform on a real board ;-)
The 74HCU04 is unbuffered, meaning it doesn't have much gain. So the
slopes will be shallower than with an 74HC04. Jitter and noise should be
fine, unless your application is really critical in which case I'd use
discrete fast transistors. With logic it greatly depends on the quality
of VCC and ground. Use at least one small ceramic SMT 0.01uF really
close to the VCC pin, and a solid ground plane.
> I've also got an AD8561 comparator, which is billed as an "upgrade for
> LT1016 designs", but I prefer the HCU solution.
Much cheaper, too. Also, you can "rent out" the remaining inverters in
there.
Regards, Joerg
Winfield Hill
>
>Winfield Hill wrote:
>> Andrew Holme wrote...
>>>
>>> Andrew Holme wrote:
>>>> Can anyone suggest a good way to convert a 2dBm, 15-25 MHz
>>>> sine wave to 5V logic levels with very fast rise times and
>>>> minimal noise / jitter.
>>
>> There are plenty of comparators that'll handle the task.
>> For example, in the older high-voltage realm, there's the
>> LT1016 and the TL3016. I also like the MAX903, which I'm
>> using for a similar job at 80MHz.
>>
>> Or you could bias an unbuffered CMOS inverter into the
>> linear region, and ac-couple the signal to it. A second
>> inverter will sharpen the risetime.
>
> Thanks Win, and everyone else, for the suggestions.
>
> I've got an MM74HCU04N stuffed in a solderless breadboard - with
> all the strays that entails - and it puts my old circuit to shame.
> Experimenting with different feedback resistors, I'm seeing 80%
> rise times below 4ns on my 100 MHz 'scope with 22k and larger.
The feedback resistor value isn't critical, if it's not too small.
> Does this wonder solution have a downside? I don't care about
> current consumption, but noise / jitter matters. Is it fair to
> say the unbuffered HCU gates have less in them to create noise?
No. You should establish a jitter spec and a way to measure it,
so you don't over-specify and reject an other-wise good solution.
That said, the jitter is easily understood by analyzing the noise
density of the amplifier performing the limiting function. The
CMOS MOSFETs are running at fairly-high currents (we observed 11mA
for an U04 at 5V), which does lower the FET's e_n, but perhaps not
as low as a BJT running at say 500uA in a high-speed comparator.
> I've also got an AD8561 comparator, which is billed as an
> "upgrade for LT1016 designs", but I prefer the HCU solution.
Yes, I was going to mention that one too.
--
Thanks,
- Win
Winfield Hill
>
> The 74HCU04 is unbuffered, meaning it doesn't have much gain. ...
The hcU04's tranconductance g_m = 30mS at 5V supply, so its gain at
frequency f is G = g_m Xc = g_m / (2pi f Cnode), which is not too
shabby. For example, G = 19 at 25MHz into a 10pF node capacitance.
Andrew's 250mV signal (125mV peak) has a zero-crossing slew rate of
S = 2pi f A = 20V/us. According to the Philips' datasheet, the U04
inverter's 25MHz gain of ~20, which would amplify this to 400V/us,
implying a 10ns risetime for the middle 4V of the swing. A second
inverter stage would further sharpen this up.
--
Thanks,
- Win
Joerg
Yes, if you don't need to get too close to the rails with the output of
this amp it is indeed not too shabby. The beauty of such solutions is
that the 2nd stage costs next to nothing because it has six inverters.
Or if it has to be priced out it would be 1/6th of 10 cents ;-)
Regards, Joerg