Anthony Fremont wrote:Yep, I just popped out to get caps, realising I didn't have any small
> Don't forget the caps to ground, or it wont start. It's only recently
> that I started using the internal osc. It's actually getting to be
> fairly usable as the new parts come along. A 16F628 I'm playing with
> right now is only fast by about 3.5% according to my 15 year old
> frequency counter. This is actually convenient for me since I can use
> Timer0 with a prescaler of 4 and get interrupts at almost exactly 1mS
> intervals (instead of 1.024mS) without having to reload it every
enough... Those I came back with (a lucky bag!) include 10pF and some
that I believe are 15pF (they're brown, unlike most of my small blue
ones!) and have "15J" written on them. The datasheet says 15pF are fine,
though that's not optimised, and I've seen other quotes of 10pF. If the
datasheet isn't clear, how am I supposed to know which is best?
And while we're on the subject, can someone please explain capacitors to
> Well, it's not quite that straightforward. You usually count a bunch ofSounds fair enough - my only worry now, is getting into the realms of
> short intervals (like milliseconds) and then do something important when
> 1000 have gone by. A common housekeeping interrupt loop time is 10mS.
> Every 100 interrupts you could add one to a seconds counter. Timer2 is
> real good at this kind of stuff, but I like to use it for other things.
> Timer0 is kinda weak (only 8 bits), but it's handy. ;-)
"threading"... Like the "random" failure I described before - not having
anything in my code assuming a register x instructions further up holds
the same value, since an interrupt may have fired in between and changed
>>Btw, is 4Mhz 4 million instructions per second? Guess I need to makeRight, even easier to remember! :-)
> No, it's 1 million instructions per second. The clock is divided by 4
> When an interrupt occurs, the GIE flag is cleared. This prevents theI read about that... I'm sure I won't make that mistake...
> scenario you described. When the ISR returns, it uses a retfie
> instruction which sets the GIE bit again so that another interrupt can
> occur. If you forget to clear the flag for the interrupt that you just
> processed, then you'll be processing it again as soon as you execute the
> retfie. ;-) This is a common mistake for newbies.
(well, I won't post it here when I do, at least ;-))
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