Phase splitter with capacitance load.
The Phantom
source of interest.
I looked up a couple of long threads that appeared on this newsgroup in
1999 and 2001. I also did a google search and found postings on various
forums.
There has been confusion about how it works for some time, and explanations
have been published (e.g., www.aikenamps.com/cathodyne.pdf) since the early
days of vacuum tube audio.
Eminent persons have thought first one way, and then the other.
Henry Pasternack in one of those long threads asked:
"How can it be that the outputs of the split-load phase splitter have
different impedances, yet the signal amplitudes track one another as the
load resistances vary equally?"
I haven't been able to find a truly detailed analysis, so I decided to do
one myself. I hope I have made it clear and persuasive enough to clear up
some of the confusion.
I posted an analysis with only DC conditions a couple of days ago. I have
now done another analysis with capacitive loading applied to the outputs.
The results are in 4 .gif files. The first shows the method of analysis,
and the next 3 show some results with different capacitive loadings.
The image files have been posted in alt.binaries.schematics.electronic and
in alt.binaries.pictures.radio.
Henry Pasternack
> I haven't been able to find a truly detailed analysis, so I decided to do
> one myself. I hope I have made it clear and persuasive enough to clear up
> some of the confusion.
It's a good effort you put into your analysis. I'm not sure who you think
is confused, though. Hopefully you don't mean me.
You're absolutely right when you say at the end that you have to analyze
the output impedances with equal loads in place at both nodes. If you try
to measure at a single node, you necessarily have to unbalance the circuit
and you get very different results at the cathode and the plate. If you perform
identical measurements at both nodes simultaneously, the circuit will stay
in balance and you will measure identical impedances.
Not to try to take away from the value of your work, but I have been saying
this for YEARS.
I don't want to argue with John, because it's always very tedious. His math
is correct; the gains and the Thevenin equivalent voltages/impedances are
different in the two halves of the circuit. And they work out to give balanced
operation overall. The difficulty with John's Thevenin models is that the
equivalent generator voltage and source impedance at one node varies with
the load on the other node, and vice-versa. From the viewpoint of the plate,
the cathode load is internal to the amplifier, and from the cathode, the plate
load is internal. If you change both loads simultaneously, as is the usual
case, the Thevenin equivalents at each node change as well. If you have
capacitive loads, the Thevenin equivalents vary as a function of frequency.
I find this very awkward and counter-intuitive.
If you restrict the loads to be equal, saying R = Ra = Rk, then you can find
a value of R = Rout such that the gain is exactly halved. Similarly, if you
say C = Ca = Ck, you can find the value of frequency where the gain drops
by 3dB and calculate Rout = 1 / (2 * pi * f * C). Bearing in mind the equal
load condition, Rout by this definition is a single number and the Thevenin
equivalent for both nodes has a single constant generator voltage and output
resistance that is load-invariant.
This is in effect a mathematical transformation that, in my opinion, makes
the external circuit behavior easier to analyze in a particular class of
applications. It does not mean it is the only possible mathematical
representation of the circuit. But I would argue that, for our applications,
this value of Rout is the "proper" one. If we do not impose the equal load
condition, then the circuit stops being a split-load phase inverter. It
becomes, depending on your point of view, either a common-cathode
amplifier with cathode negative feedback, or a cathode follower with extra
resistance in series with the plate. And then John's models are more
appropriate.
Without this simplification, to answer the question, "What is the HF bandwidth
into a capacitive load?" you have to solve for two things simultaneously: The
first is the rising gain gain with frequency due to the reduction in cathode
negative feedback. The second is the falling gain with frequency due to the
reduction in load impedance. This is precisely what you demonstrate in
your writeup, although I think it is intuitively obvious without the math.
As the load resistance drops, the negative feedback drops as well. This
causes the voltage gain to increase, partially compensating for the heavier
load. The net effect is that the apparent Rout is lower than the value
measured individually at the plate or cathode. I believe this is what Jones
is talking about when he discusses the surprising effect of series negative
feedback on output impedance at the top of p. 406 in the third edition.
I agree a lot of people are confused about this circuit. Not me, though.
I'm pleased to see that Jones became convinced of his error and ultimately
revised the text in later versions of his book.
-Henry
Ian Iveson
Famous last words!
I just visited an old friend of mine who got dragged off to
hospital and sectioned; locked up for being dangerously
confused. Of course she thinks she is behaving rationally
too.
> I'm pleased to see that Jones became convinced of his
> error and ultimately
> revised the text in later versions of his book.
Did Jones admit to an error himself, or has this just been
assumed because of the changes?
It seems unlikely to me. I am more familiar with his
treatment of the LTP, and he notes in that case that output
impedances are equal only so long as loads and inputs are
also equal. Similar kind of argument.
Maybe worth mentioning that different inter-electrode
capacitances may result in an inbalance of the concertina at
high frequencies.
I thought that's why Jones did what he did but I might be
wrong. I think that's why Van der Veen adds a cap across one
of the loads.
There is also the issue of what you do if grid current is a
possibility, or desirable, such as in a guitar amp with a
cathodyne driving the output stage. Then it makes sense to
add resistance to the cathode side to limit current and aid
recovery.
The tendency is for the anode output to wilt, and the
cathode to remain strong, whichever grid is conducting. To
the extent that the loads are unbalanced, the circuit
appears to revert to a CF + AF.
My tuppenceworth.
cheers, Ian
Henry Pasternack
> I just visited an old friend of mine who got dragged off to hospital and sectioned; locked up for being dangerously confused. Of
> course she thinks she is behaving rationally too.
Too bad for your friend, but lucky for me, I don't suffer from her
affliction.
> Did Jones admit to an error himself, or has this just been assumed because of the changes?
The Phantom posted earlier today a quote by Jones in which
he acknowledges his error.
> It seems unlikely to me.
See above.
> I am more familiar with his treatment of the LTP, and he notes
> in that case that output impedances are equal only so long as
> loads and inputs are also equal. Similar kind of argument.
This is also true.
> Maybe worth mentioning that different inter-electrode capacitances may result in an inbalance of the concertina at high
> frequencies.
In the past I have stated that my argument neglects strays. I have
measured this imbalance in real-world circuits.
> I thought that's why Jones did what he did but I might be wrong.
No, I think Jones was erroneously trying to correct for the ~10:1
difference in output impedances, measured independently.
> I think that's why Van der Veen adds a cap across one of the
> loads.
Quite likely. We have it on Andre's authority that Van der Veen is
the finest tube audio designer. Ever.
> There is also the issue of what you do if grid current is a possibility, or desirable, such as in a guitar amp with a cathodyne
> driving the output stage. Then it makes sense to add resistance to the cathode side to limit current and aid recovery.
I think the conceptual error many people make is more basic
than that. I agree that in the real world, there are practical issues
that detract from the split-load inverter's ideal performance, and
there are measures that can be taken to try to correct for them.
> To the extent that the loads are unbalanced, the circuit appears
> to revert to a CF + AF.
Yes, and I said that in my last posting, if you missed it.
> My tuppenceworth.
Sounds like we agree here. It's good to know that this important
issue has been settled and, around the globe, people from all
walks of life are breathing just a bit easier as a consequence.
-Henry
The Phantom
In the "What's happened to this NG????" thread, in a response to John
Byrns, I said:
'I also looked through some more old Wireless World magazines. In the
April 1996 issue, M. H. McFadden in a letter told Morgan Jones he was wrong
about the phase splitter.
In the July/August issue, Jones referred to McFadden's letter and described
some measurements he made which convinced him he was wrong. In his own
words:
"Mr. McFadden is therefore correct. My understanding of the operation of
the concertina phase splitter into equal loads was wrong, and I thank him
for spurring this investigation. Unfortunately, I like to know where my
equations came from, and why, but found that even Langford-Smith did not
offer a derivation."'
>
>It seems unlikely to me. I am more familiar with his
>treatment of the LTP, and he notes in that case that output
>impedances are equal only so long as loads and inputs are
>also equal. Similar kind of argument.
>
>Maybe worth mentioning that different inter-electrode
>capacitances may result in an inbalance of the concertina at
>high frequencies.
I was thinking about doing further analysis with Cgp and Cgk included, but
I need to know what the impedance driving the phase splitter would be.
Have you any suggestions? And, what would be values for the capacitance on
the output of the splitter more in line with real world values?
The Phantom
>You're absolutely right when you say at the end that you have to analyze
>the output impedances with equal loads in place at both nodes. If you try
>to measure at a single node, you necessarily have to unbalance the circuit
>and you get very different results at the cathode and the plate. If you perform
>identical measurements at both nodes simultaneously, the circuit will stay
>in balance and you will measure identical impedances.
>
When you say "perform identical measurements", are you referring to
making physical measurements? Or, do you mean measurement in an abstract
sense, such as by mathematical analysis?
If you mean physical measurements, how would you measure impedance
simultaneously at two separate nodes?
Alex
> source of interest.
>
> I looked up a couple of long threads that appeared on this newsgroup in
> 1999 and 2001. I also did a google search and found postings on various
> forums.
>
> There has been confusion about how it works for some time, and
explanations
> have been published (e.g., www.aikenamps.com/cathodyne.pdf) since the
early
> days of vacuum tube audio.
>
> Eminent persons have thought first one way, and then the other.
>
> Henry Pasternack in one of those long threads asked:
>
> "How can it be that the outputs of the split-load phase splitter have
> different impedances, yet the signal amplitudes track one another as the
> load resistances vary equally?"
>
> I haven't been able to find a truly detailed analysis, so I decided to do
> one myself. I hope I have made it clear and persuasive enough to clear up
> some of the confusion.
Alex:
The explanation is dead easy and does not need any maths and/or
spreadsheets.
It is as follows:
1) Grid current is zero, therefore
2) Cathode current and anode current are equal, therefore
3) if impedances in the cathode and anode branches are identical, then
voltages generated across them will be exactly equal (more correctly,
exactly opposite in phase).
Period...
Regards,
Alex
Henry Pasternack
> When you say "perform identical measurements", are you referring to
> making physical measurements? Or, do you mean measurement in
> an abstract sense, such as by mathematical analysis?
Either one, since the mathematical analysis predicts the physical results.
> If you mean physical measurements, how would you measure impedance
> simultaneously at two separate nodes?
When you add equal external loads to the phase inverter, the current going
into the plate, and coming out of the cathode, increases by the same amount.
To measure (or to analyze) the impedances simultaneously, inject a small
test current, di, into the plate node while sinking the same current from the
cathode node. Then measure or calculate the change in voltage, dv, which
will be the same magnitude but opposite in sign, at each node. The output
resistance, then, will be calculated by dv / di, and it will be the same top and
bottom.
Come to think of it, this would make an interesting addition to your writeup.
I did it once by hand and came up with a value, I don't remember, maybe
100 Ohms or so for my example.
-Henry
Patrick Turner
Some very long drawn out arguments which bogged down with the usual
complementary name calling from both sides occured in about 2000 between
John Byrns and
Henry Pasternak, and it looked like they'd never stop being rude and
get back to tube craft.
If you MEASURE the output resistance separately at anode and cathode of
the CPI,
( Concertina Phase Inverter ), then the anode Rout is far higher than
that of the cathode.
The act of attaching a meter to measure the Rout will affect the anode
Rout because its
the anode RL // with ( [ľ+1] x cathode RL ), or approximately = anode
RL.
At the cathode, Rout = Anode RL / tube gain for total load all //
cathode RL,
or close to 1/gM.
If an output stage following the CPI hits grid current, the loads
suddenly become
unequal because one side is cut off and the other is begining low Rin
due to grid I.
So the anode circuit of the CPI stalls first, before cathode circuit,
which tries to
soldier on and cahrage up the coupling cap more than the anode, so the
output tube with cathode drive
tends to become overbiased more than the tube driven by the naode
circuit.
The CPI itself reaches grid I itself during such overloads and the whole
caboodle becomes
very asymetrically overloaded and paralysed. This might fascinate guitar
amp users.
Hi-Fi users would never push anywhere near clipping, so they work just
fine,
and especially if its a Williamson which has a balanced voltage amp
between the CPI
and output tubes.
So usually the recovery after gross overload in amps with outputs driven
by
CPIs is slower and more laborious than when driven by an LTP.
During all this groos overload stuff, the C effects don't matter at all.
There is a lot of local negative current FB in the CPI and if the loads
are identical then
the voltages remain the same amplitude. The phase shift caused by
capacitance loads
is also the same, because its C shunting R in both cases of anode and
cathode.
But as F rises, a phase shift of 90 degrees due to C at cathode becomes
effective,
and the C is the dominant load so tube gain sags because of the lowering
Z of C loading.
The amount of NFB reduces, with less NFB available to keep the Vouts the
same at F above say 50kHz.
High gm tubes do best, so expect more bw from a 12AT7 than from a 12AX7.
In practice, C loads don't remain identical as F rises, and usually the
anode voltage sags well before the
cathode voltage by say 100kHz. To avoid the problem one adds a small
trimmer capacitance across the
cathode load, maybe 20pF is plenty, and this EVENS out the roll off of
cathode and anode voltages.
So where there is a change of capacitance load at anode or cathode, the
amplitudes of
the two phases of signals will vary as F rises.
Patrick Turner.
The Phantom
first paragraph on the second page reads:
"...we must use Eqs. (8) and (9) separately rather than use Eq. (11) for
both output voltages."
but it should read:
"...we must use Eqs. (9) and (10) separately rather than use Eq. (11) for
both output voltages."
Also, in Fig. 4, right hand part he has an expression Zg+(m+1)/m*ZL. This
should be Zg+(m-1)/m*ZL as it is in the text.
Re-reading Preisman's paper, I realized what it is that I found misleading.
He makes much of "equivalent circuits", Figs. 2, 3 and 4. But his
"equivalent circuits" are not what would be considered equivalent nowadays
without qualification. He is calling circuits "equivalent" if they have
the same output voltage. But, if you consider two of his equivalent
circuits such as the ones in Fig. 4, you will see that even though they
have the same output voltage, EL, as they stand, if a further load is
placed on them they will not behave the same. This is in contradistinction
to a Thevenin equivalent. A Thevenin equivalent behaves the same as the
circuit it replaces with respect to changing loads; Preisman's equivalent
circuits don't.
The IEEE Dictionary of electrical terms defines impedance, as it applies to
passive networks, like this (not an exact quote):
Inject a current into a node of a network and measure the voltage thus
produced at that node. Divide the voltage by the current. This is the
driving point impedance.
Inject a current into a node of a network and measure the voltage thus
produced at some other node. Divide the voltage by the current and this is
the transfer impedance to the other node.
Consider the following resistor network. It has 3 nodes and 4 resistors.
Network 1
2 ___ 1 ___ 3
.----|___|---.-----|___|---.
| 4 | 4 |
| In |
.-. .-.
| | | |
2| | | |2
'-' '-'
| |
-------------.--------------
|
GND
We'll apply a voltage to node 1 and measure the output voltages at nodes 2
and 3. The ratio of the voltage at node 2 or 3 to the voltage at node 1
will be called the gain to that output node. (Strictly, it should be
called the open circuit voltage transfer ratio.) Since this network is
intended to be driven by a voltage source, we must ground node 1 when
calculating (or measuring) the output impedance at node 2 or 3.
Let's apply 1 volt to node 1 and calculate the voltages at nodes 2 and 3.
The output voltage would be 2/6 or .3333333333 volts. The gain is 1/3 to
both nodes 2 and 3.
Ground node 1 and calculate the resistance at nodes 2 and 3. It's 2||4
ohms, or 1.33333333 ohms. Now let's apply some additional load at nodes 2
and 3, sufficient to reduce the gain to 1/2 its previous value. One would
think that a resistor equal to the output resistance of the network would
do the job. So, connect a 1.33333333 ohm resistor in parallel with each of
the 2 ohm resistors, and calculate the gain to nodes 2 and 3. It's
.166666667, which is indeed half the value without the added resistors.
Now consider this network:
Network 2
___
---------|___|----------
| 4 |
| |
| |
2 | ___ 1 ___ | 3
.-'--|___|---.-----|___|-'-.
| 4 | 4 |
| In |
.-. .-.
| | | |
2| | | |2
'-' '-'
| |
-------------.--------------
|
GND
It's the same as the first one except for the additional 4 ohm resistor
between nodes 2 and 3.
The output resistance at nodes 2 and 3 is 1.066666667 ohms. Don't forget
to ground node 1 when making this calculation.
The voltage gain from node 1 to nodes 2 and 3 is .3333333333.
What additional loads applied to nodes 2 and 3 will cause the gain to those
nodes to be 1/2 of its previous value? One might think that it would
simply be resistors equal to the output resistance. Let's try it. Add a
1.06666667 ohm resistor from node 2 and node 3 to ground, and calculate the
gain to those nodes. The result is a gain of .13761468. But we expected a
gain of .166666667; what went wrong?
The problem is that there is coupling between nodes 2 and 3 due to the 4
ohm resistor we added. If we go back to Network 1 and imagine injecting
some current into node 2 and measuring the voltage produced at node 3
(remember, node 1 must be grounded for these measurements), we can easily
see that there will be none. In other words, the transfer impedance is
zero; there is no coupling between nodes 2 and 3.
Do the same with Network 2; inject 1 amp into node 2 and calculate the
voltage produced at node 3. The result is .266666667 volts, and since 1
amp was injected, the transfer resistance is .266666667 ohms. Does this
help us find the load which will reduce the voltage gain by 1/2? Yes. The
required load is the sum of the driving point impedance and the transfer
impedance. So, connect a 1.3333333 ohm resistor from nodes 2 and 3 to
ground and calculate the voltage gains to nodes 2 and 3. The result is a
gain of .166666667, which is half the gain without the additional load.
(One could have noticed that because of the extreme symmetry of the
circuit, the additional 4 ohm resistor doesn't do much. But it does change
the output resistance at nodes 2 and 3, so from one point of view it's
clear that the same load resistance that we used with Network 1 will also
work with Network 2. But, we also have been told that load resistors equal
to the output resistance should reduce the gain by half. Using the
transfer resistance leads us back to the correct loads.)
But, we calculated an output resistance of 1.06666667 ohms; why did we need
loads of 1.3333333 ohms to reduce the gain by half? With Network 1, the
required load was equal to the calculated output resistance. Does this
mean that the output resistance of the network changes to 1.33333333 ohms
when we add two loads instead of just one?
No. The problem is that the classical voltage divider formula only works
for one output at a time. In fact, if you add a 1.066666667 ohm resistor
from node 2 to ground (but not from node 3 at the same time) and calculate
the gain to node 2, it will be .166666667, half the previous value. The
1.33333333 ohm value is not an output impedance; it is the sum (it would be
the difference if one of the gains had a negative sign) of the output
impedance and the transfer impedance. It is a number which will give you
the voltage gain when used where you shouldn't use it, in the voltage
divider formula, which is only guaranteed valid for one output at a time.
We can see that the voltage divider formula, using the actual output
impedance, is not ALWAYS valid when used for more than one output at a
time. Where it is invalid is when the network has non-zero transfer
impedances. In that case we can derive a another number (which is not the
output impedance) which will work in the voltage divider formula for two
outputs at a time. But this does not mean that the number is the output
impedance of the network. And, by the way, the only time one such number
will work for two outputs simultaneously is when the network has a high
degree of symmetry, like Network 2.
Network theory teaches that passive networks like these are completely
characterized by their driving point impedances (this is what would
normally be meant by the term output impedance) and their transfer
impedances.
In a thread back in 2001, Henry Pasternack did some example calculations
for the concertina phase splitter:
-------------------------------------------------------------------------
I suggest we plug in some values and form a practical example:
Zp = Zk = 10K
rp = 1K
u = 10
These are extraordinary values for a tube, but within reason, and easy
to push through the calculator.
For the test, we will set the source voltage to 1.0V and we will use
a test load of 990K Ohms. Note that the value of 990K in parallel with
Zp = Zk = 10K is 9.9K. We will measure the no-load voltage first, and
then observe what happens at each output when we apply the test load
first to one output, then to the other, then to both. Finally, we will
use the resistor divider equation to compute the apparent source
impedances.
Because the load resistor is so high, I'm carrying the calculations
out to many decimal places so as not to lose track of the differences.
I will call the case where the load resistor is on the leg under test
only the "proximal" case. With the resistor on the opposite leg only,
I will call it the "distal" case. With a load on both legs, I will
call it the "dual" case. To compute the apparent source impedances,
I will use the equation:
Zo = Rtest * (1 - r) / r
where 'r' is the test output divided by the no-load output
Here are the results:
Cathode circuit:
1) No load: Vout = 0.826446281
2) Proximal: Vout = 0.825688073 Zout = 909.1 Ohms
3) Distal: Vout = 0.827129860
4) Dual: Vout = 0.826377296 Zout = 82.64 Ohms
Plate circuit:
1) No load: Vout = 0.826446281
2) Proximal: Vout = 0.818858561 Zout = 9174 Ohms
3) Distal: Vout = 0.834028357
4) Dual: Vout = 0.826377296 Zout = 82.64 Ohms
---------------------------------------------------------------------
For these values:
Zp = Zk = 10K
rp = 1K
u = 10
the impedance matrix for the circuit without the added 990k loads, which
has the driving point impedances on the main diagonal and the transfer
impedances off diagonal, is:
[ 909.09091 826.44628 ]
[ 9090.9091 9173.5537 ]
Notice that the difference (difference, not sum, because of the sign change
at the plate) of the cathode driving point impedance and transfer impedance
is 909.09091 - 826.44628 = 82.64463 and the difference of the plate driving
point impedance and transfer impedance is 9173.5537 - 9090.9091 = 82.6446.
This is the "magic" number, which when used "illegally" in the voltage
divider formula applied to both outputs at once, will in fact give the
right gains. If the circuit had not been symmetrical, there would have
been two "magic" numbers.
This could be called an "apparent" output impedance, but it isn't a driving
point impedance at all. It is the difference of a driving point impedance
and a transfer impedance. It also happens to be half the impedance that
would be measured between plate and cathode. It's also the number that
would be given by an application of formula (34a) on page 330 of RDH4.
Loading both outputs of the phase splitter at once doesn't change its
driving point (output) impedances (before the loads are applied, of
course). The circuit behavior after the loads have been applied can be
calculated using the output impedances as calculated individually, one at a
time. But, of course, the calculation must also include the transfer
impedances, since they are not zero. A matrix solution of the circuit does
this automatically, and is guaranteed to give the right answers. It's very
easy to add parasitic capacitances. I recommend it.
The driving point impedances (output impedances) before any loads are
applied are plate impedance = 9173.5537 ohms and cathode impedance =
909.0909 ohms, as seen on the main diagonal of the impedance matrix.
News Client
> This could be called an "apparent" output impedance, but it isn't a
> driving point impedance at all. It is the difference of a driving
> point impedance and a transfer impedance.
I'm glad to see you get to this point in your analysis, and also that
your method is consistent with the numbers I calculated a while back.
I'm also glad to see someone bringing a proper engineering methodology
to solving the problem, and some genuine added value and interpretation.
I try to strike a balance between using formal and more intuitive
models. I think this is appropriate for an amateur newsgroup. So I
hope I made it clear why I called my result an "apparent" output
impedance. I was interested in answering what I thought the typical
amateur's question would be: What is the effect of load resistance
on the gain of the split-load inverter, and assuming symmetrical
capacitive loads, what is the frequency response?
I also wanted to show why the build-out resistor was a non-solution.
I agree the "apparent" output resistance is not a true driving point
impedance precisely because it's a single value and cannot account
for the transfer admittance between the two output terminals. But
I've always stated from the get-go that the derivation depends on
the condition of symmetry. Under that constraint the transfer
impedance can be factored into the driving point impedance and it
disappears as a separate entity. Which is not to say that it has
no effect because the "apparent" output impedance is an order of
magnitude lower than the lowest of the two separate output
impedances.
The other day, I said I thought Byrns' model was unintuitive and
awkward. Your answer helps explains why. If you're going to treat
the outputs separately, it isn't enough to model just the generator
voltages and the Thevenin equivalent output resistances. You also
need to include the transfer admittance. The only other option is
to make the Thevenin model parameterss variable as a function of
the opposite node currents.
You did your analysis using passive components and an explicit
resistor representing the transfer admittance. Many people will
say that in the real world the transfer admittance comes about
due to negative feedback within the circuit. The two points of
view are completely equivalent. I think this observation has a
strong bearing on the "Triode NFB" debate as well, although I
doubt most people reading this would agree with me.
> It also happens to be half the impedance that would be measured
> between plate and cathode.
Given symmetry, this follows from the fact that the tube floats,
and the outboard ends of the equal load resistors connect to
ground. If I'm not mistaken, Byrns made this point to adversarial
effect during one of our debates.
You know I've put a lot of time and effort into this subject over
the years. I'm glad that someone, finally, has gone through the
problem along the same lines, and to a similar depth, as I have.
The point has less to do with numbers, and more with interpretation.
It seems to me that we have a similar outlook on this thing, and
that's refreshing (for a change).
Ian Iveson
> In the "What's happened to this NG????" thread, in a
> response to John
> Byrns, I said: ...
Sorry, I rarely follow the hand-wringing, navel-gazing
threads.
> "Mr. McFadden is therefore correct. My understanding of
> the operation of
> the concertina phase splitter into equal loads was wrong,
> and I thank him
> for spurring this investigation. Unfortunately, I like to
> know where my
> equations came from, and why, but found that even
> Langford-Smith did not
> offer a derivation."'
OK. Morgan's work can be a bit of a lash-up sometimes. He
may have followed common practice wrt the series resistance,
and jumped to the wrong conclusion about the reason why.
> I was thinking about doing further analysis with Cgp and
> Cgk included, but
> I need to know what the impedance driving the phase
> splitter would be.
> Have you any suggestions? And, what would be values for
> the capacitance on
> the output of the splitter more in line with real world
> values?
It's hard to generalise. The source is often the anode of
the previous stage. The splitter may be followed by a driver
stage, or by the output valves. There may be some filtering,
depending on the circuit. Perhaps the Williamson would be a
good model?
Ian
The Phantom
<newsc...@serviceprovider.com> wrote:
>The Phantom wrote:
>> This could be called an "apparent" output impedance, but it isn't a
>> driving point impedance at all. It is the difference of a driving
>> point impedance and a transfer impedance.
>
>I'm glad to see you get to this point in your analysis, and also that
>your method is consistent with the numbers I calculated a while back.
>I'm also glad to see someone bringing a proper engineering methodology
>to solving the problem, and some genuine added value and interpretation.
>
>I try to strike a balance between using formal and more intuitive
>models. I think this is appropriate for an amateur newsgroup. So I
>hope I made it clear why I called my result an "apparent" output
>impedance. I was interested in answering what I thought the typical
>amateur's question would be: What is the effect of load resistance
>on the gain of the split-load inverter, and assuming symmetrical
>capacitive loads, what is the frequency response?
I would go even further, and call it a "fictional" output impedance. I
see even recent postings on the web (diyAudio forum, for example) with
people saying that the output impedances are equal, without using the word
"apparent".
Consider this problem. No doubt, the first thing the amateur wants to do
is determine the effect of balanced loads, but it's also important to know
the effect of unbalanced loads.
Using the values in my previous long post (which came from your 2001
post), imagine that an additional 10k load is applied to plate and cathode
and a further 100k load is applied to the plate to simulate an unbalanced
load. How shall we solve this problem?
First use the result from equation (34a) in RDH4 which gives what you
call the "apparent", but I would prefer to call the "fictional" output
impedance for balanced loads of 10k. Then recalculate the true output
impedance at the plate using equation (1) in Preisman's paper plus an
additional 5k in parallel with that value. Now we can use the voltage
divider formula on a single output, the plate output, with the true output
impedance at the plate and the 100k additional unbalanced load as inputs to
the formula. (Remembering that the cathode output will also be affected by
the unbalanced load at the plate, and we will have to find a way to
calculate that, too.)
This two step procedure will give the correct result, but what is the
amateur to think? That the output impedance is one thing with balanced
loads but another thing with unbalanced loads? We have to tell him to use
one (fictional) output impedance with the balanced part of the load, and
another (true) output impedance with the unbalanced part.
Another trap for the unwary is to think that because the true impedance
at the plate is higher than that at the cathode, a small unbalanced
capacitance will have a larger effect at the plate than at the cathode.
The effect is nearly identical whether the cap is at the plate or the
cathode. See plot #6 in my 4 part post on ABSE. A similar deviation is
obtained by putting 110 pF on the plate and 100 pF on the cathode.
These facts make me think that output impedance should be mentioned, and
it should be said that plate impedance is substantially higher than the
cathode impedance, but that the difference doesn't matter much. It should
be explained that because of the strong coupling, doing something to one
node greatly affects the other. (I know, both you and John stated and
agreed on this point.)
Perhaps it would be best to just give formulas for voltage gains that
include all parameters, such as I gave in my first post on this topic to
ABSE and ABPR (and which are identical to Preisman's). Those formulas
include the effect of all the driving point and transfer impedances. If
capacitances are included, then the very much messier formulas are in the
second post. Their complicated appearance might have been a deterrent
before the computer age, but once they're programmed into your calculator
or computer it's not a problem.
So the word to the amateur is: "Yes, the plate and cathode impedances are
greatly different, but don't try to use this fact to calculate performance.
Use the "fictional" impedance implied by formula (34a) of RDH4 for balanced
loads or the gain formulas of Eqs. (9) and (10) of Preisman's paper (for
balanced or unbalanced loads). You don't even need to know or consider the
output impedances if you use Preisman's formulas. If you want a feel for
the effect of balanced parasitics, use the fictional impedance, but
remember that it's fictional and doesn't apply to unbalanced parasitics."
Or, for the advanced amateur, just solve the whole circuit at once with
matrix methods.
>
>I also wanted to show why the build-out resistor was a non-solution.
Given that the true plate resistance is perhaps 100 times the cathode
resistance (implying a large build-out resistor), surely the degradation in
performance is immediately apparent. How could anyone not notice that? I
guess many did.
>
>I agree the "apparent" output resistance is not a true driving point
>impedance precisely because it's a single value and cannot account
>for the transfer admittance between the two output terminals. But
>I've always stated from the get-go that the derivation depends on
>the condition of symmetry. Under that constraint the transfer
>impedance can be factored into the driving point impedance and it
>disappears as a separate entity. Which is not to say that it has
>no effect because the "apparent" output impedance is an order of
>magnitude lower than the lowest of the two separate output
>impedances.
>
>The other day, I said I thought Byrns' model was unintuitive and
>awkward. Your answer helps explains why. If you're going to treat
>the outputs separately, it isn't enough to model just the generator
>voltages and the Thevenin equivalent output resistances. You also
>need to include the transfer admittance. The only other option is
>to make the Thevenin model parameterss variable as a function of
>the opposite node currents.
>
>You did your analysis using passive components and an explicit
>resistor representing the transfer admittance. Many people will
>say that in the real world the transfer admittance comes about
>due to negative feedback within the circuit.
I would simply take the point of view that a tube is a dependent source.
Things that happen at one electrode affect what goes on at another
electrode, and that effect is manifested in non-zero transfer impedances.
The very word "transconductance" tells it.
News Client
> I would go even further, and call it a "fictional" output impedance. I
> see even recent postings on the web (diyAudio forum, for example) with
> people saying that the output impedances are equal, without using the word
> "apparent".
I think the problem is very much one of semantics. If you are careful to
define the test conditions and your terminology, you should be able to
describe the problem clearly enough to avoid confusion.
But, evidently, there are enough subtleties that even people with technical
backgrounds get fouled up. It took me a while to get it straight myself.
Presiman didn't really help; the math was clear, but the interpretation was
missing. Your reformulating the problem in terms of a passive network
is helpful, I think.
> Consider this problem. No doubt, the first thing the amateur wants to do
> is determine the effect of balanced loads, but it's also important to know
> the effect of unbalanced loads.
It always seemed to me that you're pretty much hosed if you end up driving
any grid current into the following stage. The Dynaco ST-35, on the other
hand, uses a split-load inverter as a driver and it's supposed to be a
pretty
good sounding amplifier. Obviously it's going to get messed up for a while
if you end up clipping the driver on positive peaks.
> This two step procedure will give the correct result, but what is the
> amateur to think? That the output impedance is one thing with balanced
> loads but another thing with unbalanced loads? We have to tell him to use
> one (fictional) output impedance with the balanced part of the load, and
> another (true) output impedance with the unbalanced part.
It sounds like a mess. You have the same problem with long-tail drivers,
too. I was surprised the first time I calculated the coupling between the
two outputs because I had always just assumed they were effectively
isolated. Probably that was a throwback from my experience with
transistor differential amplifiers.
> These facts make me think that output impedance should be mentioned,
> and it should be said that plate impedance is substantially higher than
> the
> cathode impedance, but that the difference doesn't matter much. It should
> be explained that because of the strong coupling, doing something to one
> node greatly affects the other. (I know, both you and John stated and
> agreed on this point.)
I'm keen on simplicity, so I was always happy just to look at the question
of the split-load phase inverter "paradox" under perfectly balanced
conditions.
If I wanted to know the effect of unbalanced loads I'd just go to the full
set
of equations.
I don't know how much of this theory applies to subjective performance.
I know there are some people who say MOSFET cathode followers
buffering the driver outputs are just the bee's knees. This, of course,
would help the split-load inverter stay balanced. I've actually gotten
pretyt bored with worrying too much about sound quality. Although
sound quality still matters to me, I am relatively more interested in the
quality of the music and the performance than I used to be.
By the way, if you didn't see, the opinion has been expressed this
evening that you are a sock puppet and I am debating with myself...
The Phantom
<newsc...@serviceprovider.com> wrote:
>"The Phantom" <pha...@aol.com> wrote in message
>news:q0kqm311jmcegccso...@4ax.com...
>> I would go even further, and call it a "fictional" output impedance. I
>> see even recent postings on the web (diyAudio forum, for example) with
>> people saying that the output impedances are equal, without using the word
>> "apparent".
>
>I think the problem is very much one of semantics. If you are careful to
>define the test conditions and your terminology, you should be able to
>describe the problem clearly enough to avoid confusion.
The problem is that even if you do all that, the average reader takes away a few
key words. The person who posted in diyAudio didn't even remember "apparent";
he just remembered "equal impedance". That's why I think a stronger word might
make a more lasting impression.
>
>But, evidently, there are enough subtleties that even people with technical
>backgrounds get fouled up. It took me a while to get it straight myself.
>Presiman didn't really help; the math was clear, but the interpretation was
>missing. Your reformulating the problem in terms of a passive network
>is helpful, I think.
I would like to see more full analyses of these fundamental circuits. A lot of
it has been done in the literature, but it's not generally available on the web.
That's why I've been offering copies of some of the older papers. They have a
lot of good stuff.
Aikenamps has one of the few tube analyses i've seen where all the steps are
explained:
http://www.aikenamps.com/CommonCathode.htm
I don't read most of what is posted here. I try to judge from the subject if it
will be interesting. Theodore Sturgeon's dictum: 90% of everything is crap.
News Client
> The problem is that even if you do all that, the average reader takes away a few
> key words. The person who posted in diyAudio didn't even remember "apparent";
> he just remembered "equal impedance". That's why I think a stronger word might
> make a more lasting impression.
I realized years ago that the "average reader", without having been through
all the entry-level math and engineering courses, probably has a really hard
time following discussions like this. It's not a matter of being smart enough
(although sometimes it may be), but just the fact that without having done
all those problem sets and without having learned all those tricks, you don't
have the tools to slice through technical problems and think and talk about
them efficiently. Even if someone guides you through a solution step by
step, without knowing the lay of the land, you may not recognize where
you are when you arrive at the final answer..
So, I think it may not be productive to worry about what the average reader
takes away from the discussion, because anyone who can get the proper
point probably isn't "average" in the first place.
Back to the topic, I had a thought last night and worked it out just now. It's
a way to simplify the problem, although of course it's equivalent to any correct
analysis presented so far to date. I'm too lazy to post a diagram, but I think
the idea is simple enough that words will suffice.
In the AC model of the split-load inverter, the outboard ends of the plate and
cathode resistors are connected to ground. Assuming symmetry, no current
flows in or out of the ground connection, so it can be removed. This lets you
combine the resistors into one, R = Rp + Rk. Using the transconductance
model of the triode, you end up with three components in parallel: R, rp, and
the triode's internal current generator, and two nodes.
To get the "fictional" output impedance, inject a current into the top node and
sink the same current from the bottom node. Determine the change in voltage
across the tube and divide by two. If it were not for cathode negative feedback,
the impedance would be Rout = (1/2) * R || rp. Using the component values
from my 2001 example (rp = 1K, Ra = Rk = 10K, u = 10, gm = 0.010), we get
Rout = 476 Ohms.
But the input isn't floating, and half the voltage across the tube appears in
series with the input. Working this out (it takes about four lines of algebra),
you get:
Rout = 0.5 * R' / (1 + gm * R' / 2)
where R' = rp || R = rp || (Ra + Rk)
Plugging in the original values, the answer becomes:
R' = 1K || 20K = 952.38 Ohms
Rout = 0.5 * 952.38 / (1 + 0.01 * 952.38 / 2) = 82.64 Ohms
This is the same result I got back in 2001. But if I recall correctly, the math
I used back than was a lot more complicated because I worked it out for the
complete circuit and applied the symmetry constraint at the end.
It's interesting to note, if you call rp' = 0.5 * R' the "fictitious plate resistance",
then this answer looks a lot like the "fictitious cathode resistance" calculated
as rk' = rp ' / (1 + u), where u = gm * rp'. I don't know if that's meaningful.
It could be that formulating the problem this way makes it simple enough to
account for an unbalanced load, along the lines of the "two step" solution you
mentioned earlier. I didn't try to work that part out.
I've never seen the split-load inverter analyzer this way. I don't know if it's of
any practical value, but it game me a few minutes of entertainment, and maybe
it'll do the same for you.
The Phantom
And, here's another method.
Since Preisman's equation (11), gain = mu*Z/(rp + 2*Z + mu*Z), gives the gain to
plate and cathode when Ra and Rk are the same and equal to Z, we could always
use that formula, with Z being set equal to the parallel combination of loads.
But, let's suppose that there IS some fictional output impedance which is the
same for both plate and cathode. If there is then it must obey:
mu*Z/(rp + 2*Z + mu*Z) * Radd/(Radd + Rfict) = mu*Z'/(rp + 2*Z' + mu*Z')
where Radd is some added load and Z' = Z || Radd
In other words, the gain of the unloaded splitter, with Z being the plate and
cathode resistor, multiplied by the voltage divider effect of Rfict plus some
added load Radd, must equal the gain as given by Preisman's equation (11) with
the added load absorbed into Z (that is, Z' =Z || Radd).
If you solve this, yout get Rfict = rp*Z/(rp + 2*Z + mu*Z)