TX delay on pin 3, PTT out

[Peter Hiltz]

All,

Assuming that pin 3, PTT out, on the CN301 connector is a positive logic signal that goes high on transmit, does anyone know if there is a delay between it going high and start of transmit, specifically a delay to allow a TR relay to settle?

Since the preamp board is not available, homebrewing a TR board seems to be in order.

Thanks and 73,

Pete

[Remi echange]

Hello.

Few questions about Radioberry LPF rev 1.3; Pttout pin 3 on CN301 connector

https://github.com/pa3gsb/Radioberry-2.x-extensions/tree/master/Radioberry_LPF_V1.3/Radioberry_LPF_V1.3

The PTTout , coming from FPGA is buffered with U3 simple gate non inverting . U3 output is connected to ULN2003ADR input. The ULN2003 input current is less that 1.5mA (datasheet), thus compatible with FPGA port output current.

Thu my question to Joan, please. Why did you add U3 ? more FPGA protection?

Many thanks

Rémi F4BAD