Yep, all of the code has been tested. That is how I got the nice logic
analyzer shot in Figure 10.39.
Let me see if I can reconstruct the connections as in your email/
book:
Master Pin Slave Pin
SDO1 RP6 15 SDI1 RP5
14
SCK1OUT RP7 16 SCK1OUT RP7 16
SDI1 RP5 14 SDO1 RP6
15
SLAVE_ORDY RB2 6 SLAVE_ORDY RB2
6
SLAVE_ENABLE RB3 7 SS1IN RP3 7
Yes, those are the correct connections.
First, try sending a short string, like 'heck', or something like
that, only use four characters so that you can ensure the input UART
is not getting overrun for some reason (even though an error message
should be printed if this occurs).
Once the string is sent by the Master and received by the slave, the
master negates the SLAVE_ENABLE line (makes it high). The slave will
then assert the the SLAVE_ORDY line (make it high) after the string is
reversed. The master will then assert SLAVE_ENABLE (make it low),
read the reverse string via the SPI bus. When the last character is
read from the slave, the slave will negate SLAVE_ORDY (make it low),
and the master will negate SLAVE_ENABLE (make it high).
If the slave is sending a high true pulse on SLAVE_ORDY, then this
seems to indicate that the master is reading the entire reversed
string back from Slave; but I assume you are not seeing this on appear
on your console output.
Does the console appear to lock up after you input the 64-byte
string?
What console program are you using?
I assume you are using the code 'as is' from the code archive.