the Usage of ROM and RAM of Cortex-M3 on OMAP4

[Barry Song]

Hi All,
typically on OMAP4, Cortex-A9 will load the Cortex-M3 firmware and let
M3 run from the firmware. for example, on Android, Linux kernel will
use remoteproc module to load ducati-m3-core0.xem3 of Ducati.
but after reading the datasheet of OMAP4, there are internal 16KB ROM
and 64KB RAM for Cortex-M3. And the ROM is bootable. I'd like to know
who is using the embedded ROM and RAM and how they use. and can the
Cortex-M3 boot from ROM directly by itself?

Thanks
barry

[Nicolas Dechesne]

i don't think the ROM is being used. at least i am not aware of anyone
who would have developed a ROM code for Ducati... so i don't think you
can use the ROM. as for the RAM if you refer to what's called 'SL2
memory', it's being used by the codecs (IVAHD), it's just RAM that can
be used freely if you don't use IVAHD.

[Tom Mitchell]

Have you pulled the data bits from http://infocenter.arm.com ?

I think the dynamics of internal ROM and RAM discussed in the documents
for the newer Beaglebone black
https://github.com/CircuitCo/BeagleBone-Black/blob/master/BBB_SRM.pdf
are informative. For a vendor able to poke and prod the EEROM there
are choices that end boards would
never enable to not "brick" the card in the wild....

I found this...

"At Reset, ARMv7-M processors always boot from a vector table at address zero.
With uninitialized memory at address zero (for example, unprogrammed
Flash or uninitialized RAM), the processor will read a spurious
initial Main Stack Pointer value from address zero and a spurious code
entry point (Reset vector) from address 0x4, possibly containing an
illegal instruction set state specifier (ESPR.T bit) in bit[0].
"The processor may lock up immediately, or may execute some spurious
opcodes, though in the latter case, lock-up remains a possible
outcome.
"Answer
"A clean boot-up can be achieved through the actions of a debugger
connected to the processor's debug port (assuming that the SoC has
implemented Debug features for the processor)."

ARM bootstrap is a tangle...

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T o m M i t c h e l l

[Barry Song]

Hi Nicolas,
thanks very much for your reply.

2013/5/21 Nicolas Dechesne <nde...@gmail.com>:

if nobody can use the ROM, is bootrom firmware or something else in
OMAP4 using it? so what's the purpose of this ROM? the ROM is said
bootable, but we only boot M3 by Cortex-A9.

-barry

[Barry Song]

thanks, Tom. what is the content placed in the ROM of Cortex-M3 of OMAP4? what is the ROM doing?
is it finishing some boot initilization?

[Nicolas Dechesne]

On Sun, Jun 16, 2013 at 3:35 AM, Barry Song <21c...@gmail.com> wrote:
> thanks, Tom. what is the content placed in the ROM of Cortex-M3 of OMAP4?
> what is the ROM doing?
> is it finishing some boot initilization?

it doesn't contain anything meaningful. it was added in Ducati
subsystem, as Ducati was anticipated to be used standalone outside of
OMAP4 (and with no A9), in which case the ROM would have been used to
boot ducati. but on OMAP4 the ROM isn't being used at all.

the entire Ducati/CortexM3 initialization is managed by A9/remoteproc
(load the firmware, initialize MMU and release the M3 from reset). all
the remaining init code is contained in the firmware.

[Barry Song]

2013/6/17 Nicolas Dechesne <nde...@gmail.com>:

Nicolas, thanks. any other user of Ducati except OMAP?

-barry

[Nicolas Dechesne]

On Mon, Jun 17, 2013 at 12:28 PM, Barry Song <21c...@gmail.com> wrote:
> Nicolas, thanks. any other user of Ducati except OMAP?

some of the TI81xx devices, iirc.