Panda + FPGA via GPMC

[tom]

Dear List,

I'm interested in attaching an FPGA to the Pandaboard via GPMC in the
expansion header.
I know that there is an accepted PEAP that aims at exactly that.
I'd be interested in the status of this project. The website (
http://pandaboard.it-web.info/ )
seems to be a bit out of date.
I'd really be interested in the status of the project.

Thank you,
Tom

[Nibblonian]

Hi Tom,

sorry for the delayed response, my first attempt to answer seems to not have made it to the list.

I'm the one carrying out the GPMC project mentioned by you.
Unfortunately the design of the FPGA expansion board hardware had some serious delays and I'm currently using a custom level shift board as an intermediate step.
It connects the PandaBoard to a Xilinx SP605 with XM105 or to an Altera/Terasic INK.
I received the board recently and was able to verify it's functionality using simple SPI communication.

Next steps will be integrating GPMC with the Ubuntu Kernel and finish the final FPGA expansion board.

Updating the website and making my GIT puplic is also on my list.

Regards,
David

[Nibblonian]

Hi Tom,

I'm the one carrying out the project you mentioned.
Unfortunately I was facing a huge delay in building the needed
hardware.
As a intermediate step, I built a level shifter board, allowing to
interface the PandaBoard to Xilinx SP605 or Altera INK.
I was successful connecting to the FPGA via SPI and will now move on
to GPMC.

Updating the website and making my git repository public is on my list
and I hope to be able to do this soon.

Regards,
David

[tom]

Hi David,

Thanks for the update!

> Unfortunately the design of the FPGA expansion board hardware had some
> serious delays and I'm currently using a custom level shift board as an
> intermediate step.

So you have to convert from 1.8 to 3.3V (and vice versa), right?

> It connects the PandaBoard to a Xilinx SP605 with XM105 or to an
> Altera/Terasic INK.

Ok - that sounds interesting. I'm having an older Altera DE2 board
(with a Cyclone II). But it might be sufficient to do some additional
testing once you have completed GPMC code for Linux and some test core
for the FPGA. So please let me know if you need help with testing.

> Next steps will be integrating GPMC with the Ubuntu Kernel and finish the
> final FPGA expansion board.

Ok. I guess basic GPMC support should already be in the kernel, right?

Some more questions: For the final FPGA board: Which FPGA do you plan
to
use? Do you plan to add additional memory (SRAM, SDRAM) to the
expansion
board? I guest that at least having the option for that might be
pretty
handy for many projects. How will the FPGA be programmed in the final
setup? Do you intend to do this from the Linux system on Panda or some
other way?

Thanks,
Thomas

P.S.: Yes - i also experienced that it takes "ages" (1 to 2 days) for
messages to actually show up on the pandaboard list.

[Dennis]

Hi there,

I am trying to communicate on FPGA to GPMC port too. using pandaboard. I am planning to use gpmc-nand.c but I can't find where to enable it on menuconfig. How do you make your works. gpmc-nand.c is in arc/arm/mach-omap2/

[dmitry pervushin]

Hello,

gpmc-nand.c will be built if you enable CONFIG_MTD_NAND_OMAP2, which can
be enabled under Device Drivers | Memory Technology Drivers (MTD)
support | NAND Device support | NAND flash device on OMAP2, OMAP3 and OMAP4

Hope this helps.

> (http://pandaboard.it-web.info/ <http://pandaboard.it-web.info/>)

> > seems to be a bit out of date.
> > I'd really be interested in the status of the project.
> >
> > Thank you,
> > Tom
>

--
Sincerely yours,
dmitry pervushin

[benjamin davis]

Has anyone made progress with a device tree configured gpmc nand driver. I am having trouble getting the L3 clock enabled. I also don't immediately see the way to extend the gpmc_band.c for my purposes. I just need a simple driver that can read and write on cs0 and support interrupts.

[yicha...@gmail.com]

Long time ago I use a cpld connected to GPMC interface,with a 16c554 on it 

i think it's not too hard to use GPMC

refer to smsc ethernet driver in the kernel,you will find what you want

在 2011年1月27日星期四UTC+8下午11时27分51秒，tom写道：

[benjamin davis]

OK, got it.  I was substantially over thinking this effort.  In the end I had the majority of the custom driver working weeks ago but my ignorance with the device tree integration of the GPMC driver had me running in circles.  I want to extend this thread with a few helpful hints and knowledge nuggets I picked up along the way.  If some of you OMAP guru's know of a better method for any off these items please chime in.  

I will try to upload some example files of interest..

Goal:

I intend to integrate a user-space accessible character device node for communicating between an OMAP4460 and Xilinx FPGA via NAND protocol.  Initial development is on a Pandaboard-ES using the omap-linux 3.13 kernel source.

Kernel Hacks:

cclock44xx_data.c and gpmc.c were modified to enable the L3 FCLK of the GPMC hardware.  This was adapted from the code on this thread http://e2e.ti.com/support/omap/f/849/p/311510/1089424.aspx#1089424

you may also want to export some symbols to simplify your integration.

uEnv.txt:

In order to enable the GPMC chip-selects of interest I had to set the CONFIG7_i registers for each per the TRM prior to booting the kernel.  I set these registers to 0xf41, 0xf42, 0xf43, 0xf44, 0xf45, 0xf46, 0xf47, 0xf48 respectively.  This sets each chip-select to a memory space size of 16MB (the minimum), enables the respective chip-select, and sets the memory space base addresses to 0x1000000 times the value in the least significant 6 bits. So CS0 = 0x1000000, CS1=0x2000000, ...CS7=0x8000000

Devicetree:

Since I am going to eventually have a custom board I hacked omap4.dtsi and omap4-panda-es.dts directly.  

First set up your pinmaps in the device tree.  I did this too late and feel it is important to do sooner rather than later.

Initially I started with the nand-gpmc configurations I found in Documentation/devicetree/bindings under the kernel build tree.  I had to dig deeply into gpmc.c to read the supported devicetree tags and fully customize my nand node(s).  I enabled debug in the gpmc.c file and subsidized that with some verbose debug of my own to fully wrap my head around code.  I also noticed that sync-read and sync-write were not as flexible as I had hoped.  In order to set a particular chip-select to asynchronous I had to remove the tags completely instead of just setting it to "= <0>;"

I had to add my custom devices directly under the OCP node.  I flailed attempting to set it in the discrete chip-select nodes and under the gpmc node.

Platform driver:

From here you are into a standard platform driver.  Remember to include soc.h and gpmc.h for some helpful macros.  On my driver init function I had to re-enable the L3 clock and set the GPMC clock mux which got disabled somewhere in the booting of the kernel.

Manually adding you module at this point will allow you to use devmem2 to actuate the respective chip-selects.  You will see the chip-select of interest drop from 1.8volts to almost 0 volts for each bus access.  If you are configured for an 8 bit NAND a 32 bit write will strobe the gpmc-nCS0 low 4 times.  If you change the nand-bus width in the devicetree and reboot the same write will only strobe the chip-select low twice.

In my driver a probe of each chip-select will cause a chardev to be allocated, registered and fops assigned.  Each remaps its respective memory space configured in the CONFIG7 register (ioremap_nocache).  Now any read/write activity in the mapped memory space will actuate the correct chip-select and perform the transaction on the BUS.

If you configure a chip-select for synchronous mode you can see the 200 MHz clock on the gpmc-clk pin of J6.  You can also confirm the chip-select activity as you write to each memory space.

I hope this can help someone else coming into the OMAP world like I did.