is there any API under w2k SP1 to atomically exchange two 64-bit values? Any
hints for rolling your own, besides using critical sections?
// Johan
Don Burn
Windows 2000 Device Driver and Filesystem consulting
"Johan Nilsson" <johan.nilsson@---.esrange.ssc.se> wrote in message
news:uoYhGnslAHA.1724@tkmsftngp04...
I forgot to mention one small thing - user mode. Is there a
NtInterlockedCompareExchange64 that one could dynamically link to by any
chance?
// Johan
"Don Burn" <bu...@acm.org> wrote in message
news:t8m5irt...@corp.supernews.com...
Rob
"Johan Nilsson" <johan.nilsson@---.esrange.ssc.se> wrote in message
news:OuZeG8xlAHA.1720@tkmsftngp02...
// Johan
"Rob Pitt" <Rob...@REMOVEME.cyberdude.com> wrote in message
news:t8n9kl9...@corp.supernews.com...
>Any code samples available as you know of? I tried checking the Intel
>website but couldn't find any.
>
>// Johan
>
http://webster.cs.ucr.edu/Page_asm/ArtofAssembly/CH06/CH06-2.html#HEADING2-286
"Art of Assembly, Chapter six-2
The Pentium processor supports a 64 bit compare and exchange
instruction - cmpxchg8b. It uses the syntax:
cmpxchg8b ax, mem64
This instruction compares the 64 bit value in edx:eax with the memory
value. If they are equal, the Pentium stores ecx:ebx into the memory
location, otherwise it loads edx:eax with the memory location. This
instruction sets the zero flag according to the result. It does not
affect any other flags.
Here are two examples for cmpxchg8b using msvc++6.0 inline assembly.
void _InterlockedExchange64(__int64 * ptr64, __int64 val64)
{
__asm {
// push ebx //not needed if compiler saves used regs
// push esi
mov esi, [ptr64]
mov ecx, dword ptr [val64]
mov ebx, dword ptr [val64 + 4]
mov eax, dword ptr [esi]
mov edx, dword ptr [esi + 4]
l0: lock cmpxchg8b [esi]
jne l0
// pop esi
// pop ebx
}
}
__int64 _InterlockedCompareExchange64(__int64 * ptr64,
__int64 val64, __int64 comp64)
{
__asm {
// push ebx //not needed if compiler saves used regs
// push esi
mov esi, [ptr64]
mov ecx, dword ptr [val64]
mov ebx, dword ptr [val64 + 4]
mov eax, dword ptr [comp64]
mov edx, dword ptr [comp64 + 4]
lock cmpxchg8b [esi]
// pop esi
// pop ebx
}
}
HTH, Frank
Many thanks // Johan
"Frank Ostrowski" <fr-...@web.de> wrote in message
news:ercq8tk8bi2oonq2t...@4ax.com...
> On Fri, 16 Feb 2001 12:00:38 +0100, "Johan Nilsson"
> <johan.nilsson@---.esrange.ssc.se> wrote:
>
> >Any code samples available as you know of? I tried checking the Intel
> >website but couldn't find any.
> >
> >// Johan
> >
>
>
http://webster.cs.ucr.edu/Page_asm/ArtofAssembly/CH06/CH06-2.html#HEADING2-2
86
>
> "Art of Assembly, Chapter six-2
> The Pentium processor supports a 64 bit compare and exchange
> instruction - cmpxchg8b. It uses the syntax:
>
> cmpxchg8b ax, mem64
> This instruction compares the 64 bit value in edx:eax with the memory
> value. If they are equal, the Pentium stores ecx:ebx into the memory
> location, otherwise it loads edx:eax with the memory location. This
> instruction sets the zero flag according to the result. It does not
> affect any other flags.
>
> Here are two examples for cmpxchg8b using msvc++6.0 inline assembly.
>
> void _InterlockedExchange64(__int64 * ptr64, __int64 val64)
> {
> __asm {
> // push ebx file://not needed if compiler saves used regs
> // push esi
> mov esi, [ptr64]
> mov ecx, dword ptr [val64]
> mov ebx, dword ptr [val64 + 4]
> mov eax, dword ptr [esi]
> mov edx, dword ptr [esi + 4]
> l0: lock cmpxchg8b [esi]
> jne l0
> // pop esi
> // pop ebx
> }
> }
>
> __int64 _InterlockedCompareExchange64(__int64 * ptr64,
> __int64 val64, __int64 comp64)
> {
> __asm {
> // push ebx file://not needed if compiler saves used regs