So we have to unmask LVTPC only if we're configured to have one.
Reported-by: Ingo Molnar <mi...@elte.hu>
CC: Lin Ming <ming....@intel.com>
CC: Peter Zijlstra <pet...@infradead.org>
Signed-off-by: Cyrill Gorcunov <gorc...@openvz.org>
---
arch/x86/kernel/cpu/perf_event_p4.c | 2 ++
1 file changed, 2 insertions(+)
Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
=====================================================================
--- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
+++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
@@ -365,8 +365,10 @@ static int p4_pmu_handle_irq(struct pt_r
}
if (handled) {
+#ifdef CONFIG_X86_LOCAL_APIC
/* p4 quirk: unmask it again */
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
+#endif
inc_irq_stat(apic_perf_irqs);
}
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This ugly #ifdef looks like a workaround though. Why doesnt apic_write() map
to nothing in that case?
Ingo
It is. I mean -- it maps to nothing if apic is disabled. But the scenario is
that no apic configured at all. Actually I wonder how this code is supposed to
work without apic support.
Pehpaps better to make a p4 quirk helper here, since #ifdef at this point looks
ugly indeed.
Don't apply it then. Will back with other solution.
-- Cyrill
apic_write() is really just equivalent to a spin_lock() on UP without
UP_IOAPIC set - it should do nothing. So if it does something and fails the
build, then that should be fixed - not the P4 PMU code.
Ingo
Looking at code a bit and config deps I think the former proposal with
#ifdef is minimal (in amount of changes) and sufficient. perf_event.c
uses #ifdef CONFIG_X86_LOCAL_APIC for the very same reason.
The former issue with config dependencies is that we may need to compile
perf_event.c without CONFIG_LOCAL_APIC support at all (and this is a case
for which you've posted the config). CONFIG_LOCAL_APIC deps on X86_UP_APIC,
the config has no X86_UP_APIC support and as result -- no CONFIG_LOCAL_APIC and
no apic.o compiled.
So, as expected, no apic_write/read and friends there. We may introduce
apic_write/read weak(s) but this would only mess the code more and would
smell unpleasant I think :) .
All-in-once: unresolved external symbol here, which could be fixed either
by introducing dummy symbol, or conditional compilation. I think the second
is preferred if the issue is just one line code.
Or you mean something different and I took a wrong mind-path?
-- Cyrill
Well it's not just one line of code as (like you mentioned) perf_event.c is
affected as well.
Introducing a dummy (NOP) placeholder method is what we are doing in all the
other cases (such as spin_lock()), we dont pollute the kernel with #ifdefs.
Ingo
ok, understood what you mean. will back with patch.
-- Cyrill
ok, Ingo, this will consume some time. Could you pick up the original patch
just for now (so that testing builds will not fail), I'll back to this task
tomorrow or at Monday. OK?
-- Cyrill
x86, perf: Unmask LVTPC only if we have APIC supported
Ingo reported:
|
| There's a build failure on -tip with the P4 driver, on UP 32-bit, if
| PERF_EVENTS is enabled but UP_APIC is disabled:
|
| arch/x86/built-in.o: In function `p4_pmu_handle_irq':
| perf_event.c:(.text+0xa756): undefined reference to `apic'
| perf_event.c:(.text+0xa76e): undefined reference to `apic'
|
So we have to unmask LVTPC only if we're configured to have one.
Reported-by: Ingo Molnar <mi...@elte.hu>
Signed-off-by: Cyrill Gorcunov <gorc...@openvz.org>
CC: Lin Ming <ming....@intel.com>
CC: Peter Zijlstra <pet...@infradead.org>
LKML-Reference: <20100313081116.GA5179@lenovo>
Signed-off-by: Ingo Molnar <mi...@elte.hu>
---
arch/x86/kernel/cpu/perf_event_p4.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 381f593..ef861da 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -365,8 +365,10 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)