From: Andrew Haley <andre...@littlepinkcloud.invalid>
Date: Tue, 31 Jul 2012 11:27:09 -0500
Local: Tues, Jul 31 2012 12:27 pm
Subject: Re: Suspicious assembly code generated by GCC 4.5.2
el <elgar...@gmail.com> wrote:I see that you got another answer on the gcc list: it's a bug. MIPS
> On Tuesday, July 31, 2012 12:19:44 PM UTC+3, Andrew Haley wrote:
>> el wrote:
>> > I'm working on a MIPS-based embedded system.
>> > Below is an assembly code snippet of the end of some function.
>> > This code was compiled by gcc 4.5.2 with -mips16e and -Os flags.
>> > - Line 6: the stack frame is released and ra,s0 and s1 registers are restored from the stack.
>> > - Line 8: returns to the caller function (jump to the return address)
>> > - Line 9: branch delay slot instruction which stores in v0 (return value) a value pointed by register a0
>> > Note that 0(a) is located in the stack (sp + 26) - see lines 2,3,5
>> > 1) 8024c3be: 9206 lw v0,24(sp)
>> > This asm code (generated by GCC) seems to be faulty as the cpu reads value from the stack frame (line 9) after it was 'released' (line 6).
>> > Regardless of the RTOS I'm using (it's not linux), is this code legitimate?
>> It's not necessarily wrong. This is a matter of whether the system
> Our OS is FreeRTOS and use MIPS without shadow registers. so upon
doesn't use a red zone.
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