[dorkbotpdx-blabber] LT3652 charging circuit, eagle files
Mathew Lippincott
Problems:
selecting an inductor/ flexible mount so that inductors can be switched out.
sourcing resistors in the right values for the float voltage resistive divider.
I've made a zip with the Eagle files, my LT3652 library, a spreadsheets of parts, another of component selection equations from the datasheet, and the datasheet, if anyone would like to take a look.
http://www.cloacina.org/blog/wp-content/uploads/2010/07/LT3652_MWL.zip [ www.cloacina.org/blog/wp-content/uploads/2010/07/LT3652_MWL.zip ]
Thanks,
Mathew
Erik Walthinsen
> With some advice from Ken Lee I've put together preliminary eagle files
> for a solar charger development board using the LT3652 to charge 3.7
> Lithium Ion cells. I'm new to power systems and eagle, so any advice is
> appreciated.
Looks pretty nice, though there are some tweaks I'd do the the board, in
a few general categories and no particular order:
- Shrink traces to equal or less than the width of the pad (resistor,
etc.) you're connecting. There's usually no point in having more
capacity than the package's connection.
- Find&destroy all 90 degree angles. Rounded or not they're as
disruptive as a hard turn on a racetrack to those poor electrons.
- I never did get the point of square vias except as pin-1 markers, and
IMO Eagle's default is just dumb. Round vias work identically and allow
octagonal routing around them rather than just square.
- For higher-current paths, increase the drill size of the via to match,
or add multiple vias in the overlap.
- Run Eagle's DRC with Check Angle to get all those wacky non-45's.
- See if you can get away with only 2 or 3 trace size. From
ExpressPCB's website, here's what they suggest for current limits:
0.010" 0.3 Amps
0.015" 0.4 Amps
0.020" 0.7 Amps
0.025" 1.0 Amps
0.050" 2.0 Amps
0.100" 4.0 Amps
0.150" 6.0 Amps
This depends on the thickness of the copper of course, but it's a good
place to start at least.
- It looks to me as if there are only a few actual high-current traces.
Use Eagle's "net classes" feature to enhance your design rules:
Edit->Net classes, define classes 1+ as "power", etc. and set bigger
minimum trace sizes. Change the net class on the relevant traces, then
globally reset all traces to a default small size. Run DRC to spot the
traces you need to beef back up to the right size.
Obvious trouble spots (to me) on your PCB are:
- The trace to the center of connector SL1 is way oversized compared to
its GND connection, and there are a multiple of 90 bends coming out of
it. It's also too close to the trace coming off the other size of R5,
which AFAICT carries the same current but on a radically smaller trace
that probably needs to be beefed up itself, since it is the main current
path.
- The trace between L1, C2, and D3 has an acute inside angle. It would
be better to route from D3 down-right then right to L1, then straight up
to C2. Or, rotate C2 to vertical, and move the R5->IC trace (which
needs 45's anyway) over a little, shoving the upper L1 via to the right
to straight that trace out.
As far as the resistors go, I'd be tempted to run a single through-hole
footprint straddling a series pair of 0805 or 1206's. You can series
through-hole resistors mid-air, or gang SMT's on the board. Rotate the
SMT's opposite the through-hole and run them side-by-side to keep the
"meta-resistor" size under control.
Check through Digikey's parts selector to find out what resistor values
are actually available and in what packages. Being within ~1% is
probably more than sufficient for this. Be careful to actually *get* 1%
or better parts:
<http://blog.makezine.com/archive/2010/06/the_curious_case_of_the_7_resistors.html>
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Mathew Lippincott
Thanks for all of your advice, I've revised the circuit following your suggestions, and layout guidelines on the datasheet I'd missed (moved the capacitors in closer to the IC). Any thoughts on my revised board are appreciated.
the files are here:
http://www.cloacina.org/blog/wp-content/uploads/2010/07/LT3652_MWL2.zip [ www.cloacina.org/blog/wp-content/uploads/2010/07/LT3652_MWL2.zip ]
thanks,
Mathew
On 07/23/2010 03:08 PM, Mathew Lippincott wrote:Looks pretty nice, though there are some tweaks I'd do the the board, in a few general categories and no particular order:
With some advice from Ken Lee I've put together preliminary eagle files
for a solar charger development board using the LT3652 to charge 3.7
Lithium Ion cells. I'm new to power systems and eagle, so any advice is
appreciated.
- Shrink traces to equal or less than the width of the pad (resistor, etc.) you're connecting. There's usually no point in having more capacity than the package's connection.
- Find&destroy all 90 degree angles. Rounded or not they're as disruptive as a hard turn on a racetrack to those poor electrons.
Did my best, not sure what to do about 3-point junctions, but there are no other 90 degree turns.
- I never did get the point of square vias except as pin-1 markers, and IMO Eagle's default is just dumb. Round vias work identically and allow octagonal routing around them rather than just square.
- For higher-current paths, increase the drill size of the via to match, or add multiple vias in the overlap.
- Run Eagle's DRC with Check Angle to get all those wacky non-45's.
- See if you can get away with only 2 or 3 trace size. From ExpressPCB's website, here's what they suggest for current limits:
0.010" 0.3 Amps
0.015" 0.4 Amps
0.020" 0.7 Amps
0.025" 1.0 Amps
0.050" 2.0 Amps
0.100" 4.0 Amps
0.150" 6.0 Amps
Routed the whole thing with .01 and .032 traces. The circuit shouldn't go above 500mA so they should be fine.
This depends on the thickness of the copper of course, but it's a good place to start at least.
- It looks to me as if there are only a few actual high-current traces. Use Eagle's "net classes" feature to enhance your design rules: Edit->Net classes, define classes 1+ as "power", etc. and set bigger minimum trace sizes. Change the net class on the relevant traces, then globally reset all traces to a default small size. Run DRC to spot the traces you need to beef back up to the right size.
Obvious trouble spots (to me) on your PCB are:
- The trace to the center of connector SL1 is way oversized compared to its GND connection, and there are a multiple of 90 bends coming out of it. It's also too close to the trace coming off the other size of R5, which AFAICT carries the same current but on a radically smaller trace that probably needs to be beefed up itself, since it is the main current path.
- The trace between L1, C2, and D3 has an acute inside angle. It would be better to route from D3 down-right then right to L1, then straight up to C2. Or, rotate C2 to vertical, and move the R5->IC trace (which needs 45's anyway) over a little, shoving the upper L1 via to the right to straight that trace out.
As far as the resistors go, I'd be tempted to run a single through-hole footprint straddling a series pair of 0805 or 1206's. You can series through-hole resistors mid-air, or gang SMT's on the board. Rotate the SMT's opposite the through-hole and run them side-by-side to keep the "meta-resistor" size under control.
I did a rev. of the board like that, but my problem finding a 1150K 1W resistor was solved by just using 1/4W resistors. you're right that they aren't high-current traces, so 1/4W should do fine, right?
Check through Digikey's parts selector to find out what resistor values are actually available and in what packages. Being within ~1% is probably more than sufficient for this. Be careful to actually *get* 1% or better parts:
<http://blog.makezine.com/archive/2010/06/the_curious_case_of_the_7_resistors.html>
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