An unusual occurrence, for me at least, as I was presented with the
following, below:
-------------------------------[ BOF ]-------------------------------
$ SHOW CPU /FULL
System: ALAHIS, AlphaServer DS10 470 MHz
SMP execlet = 3 : Disabled : Uniprocessing.
Config tree = None
Primary CPU = 0
HWRPB CPUs = 1
Page Size = 8192
Revision Code =
Serial Number = (virt.) AY11707604
Default CPU Capabilities:
System: QUORUM RUN
Default Process Capabilities:
System: QUORUM RUN
CPU 0 State: RUN CPUDB: 81C18000 Handle: * None *
Process: SYSTEM PID: 21200498
Capabilities:
System: PRIMARY QUORUM RUN RAD0
Slot Context: 856FC180
CPU - State..........: RC, PA, PP, CV, PV, PMV, PL
Type...........: EV6 (21264), Pass 2.5
Speed..........: 463 Mhz
Variation......: VAX FP, IEEE FP, Primary Eligible
Serial Number..:
Revision.......:
Halt Request...: 0
Software Comp..: 0.0
PALCODE - Revision Code..: 1.98-01
Compatibility..: 83
Max Shared CPUs: 1
Memory Space..: Physical = 00000000.00000000 Length = 0
Scratch Space..: Physical = 00000000.00000000 Length = 0
Bindings:
DECW$SERVER_0 PID = 21200427 Reason: Affinitized to this CPU
Fastpath:
PKB0
BG0
Features:
Autostart - Enabled.
Fastpath - Selection enabled as Preferred CPU.
$ ANALYZE /SYSTEM
OpenVMS system analyzer
SDA> CLUE CONFIGURATION
System Configuration:
---------------------
System Information:
System Type AlphaServer DS10 470 MHz Primary CPU ID 0.
Cycle Time 2.16 nsec (463 MHz) Pagesize 8192 Byte
--------------------------------[ EOF ]--------------------------------
To other DS10 users: Has this ever happened to you? Anyway, I wonder
where and how this could have happened.
In article <4f1af519$0$6918$e4fe5...@news2.news.xs4all.nl>, MG <marcog...@SPAMxs4all.nl> writes:
>An unusual occurrence, for me at least, as I was presented with the
>following, below:
>-------------------------------[ BOF ]-------------------------------
>$ SHOW CPU /FULL
>System: ALAHIS, AlphaServer DS10 470 MHz
> SMP execlet = 3 : Disabled : Uniprocessing.
> Config tree = None
> Primary CPU = 0
> HWRPB CPUs = 1
> Page Size = 8192
> Revision Code =
> Serial Number = (virt.) AY11707604
> Default CPU Capabilities:
> System: QUORUM RUN
> Default Process Capabilities:
> System: QUORUM RUN
>> An unusual occurrence, for me at least, as I was presented with the
>> following, below:
> [470 MHz vs. 463 MHz]
> Digital exaggerated the speed ratings of some of its Alpha products
> slightly for some (marketing, I assume) reason.
It seems to me, quite possible, that some of the chips could be clocked at 470 MHz or even higher. When they say 463 MHz, they mean that ALL the chips so designated can be successfully clocked at 463 MHz. Now if you tested all those chips you would probably find that many of them could be successfully overclocked if you were very careful about keeping the temperature of the chip withing limits.
>> An unusual occurrence, for me at least, as I was presented with the
>> following, below:
> [470 MHz vs. 463 MHz]
> Digital exaggerated the speed ratings of some of its Alpha products
> slightly for some (marketing, I assume) reason.
The measured cycle time is 2.16 ns. How accurate do you think you can measure cycle time? What is the cycle time to get to 470 MHz?
Just do the math, and realize that the measurement of cycle time can't be done with enough precision to get the absolute right number.
> On 2012-01-22 05.37, Michael Moroney wrote:
>> MG<marcog...@SPAMxs4all.nl> writes:
>>> An unusual occurrence, for me at least, as I was presented with the
>>> following, below:
>> [470 MHz vs. 463 MHz]
>> Digital exaggerated the speed ratings of some of its Alpha products
>> slightly for some (marketing, I assume) reason.
> The measured cycle time is 2.16 ns. How accurate do you think you can
> measure cycle time? What is the cycle time to get to 470 MHz?
> Just do the math, and realize that the measurement of cycle time can't
> be done with enough precision to get the absolute right number.
FYI: 470 MHz gives a cycle time of 2.12766 ns. 463 MHz gives a cycle time of 2.15983. That is a difference of 32.17 ps. 32 picoseconds is pretty little. Is the accuracy of the measurements enough to deal with such small times?
All that said, I do not know if the stated 470 MHz is actually true. Anyone checked the actual crystal or clock generator circuitry to see what is actually the frequency base?
In article <jfh1s0$1c...@Iltempo.Update.UU.SE>, Johnny Billquist <b...@softjar.se> writes:
>On 2012-01-22 13.13, Johnny Billquist wrote:
>> On 2012-01-22 05.37, Michael Moroney wrote:
>>> MG<marcog...@SPAMxs4all.nl> writes:
>>>> An unusual occurrence, for me at least, as I was presented with the
>>>> following, below:
>>> [470 MHz vs. 463 MHz]
>>> Digital exaggerated the speed ratings of some of its Alpha products
>>> slightly for some (marketing, I assume) reason.
>> The measured cycle time is 2.16 ns. How accurate do you think you can
>> measure cycle time? What is the cycle time to get to 470 MHz?
>> Just do the math, and realize that the measurement of cycle time can't
>> be done with enough precision to get the absolute right number.
>FYI: 470 MHz gives a cycle time of 2.12766 ns. 463 MHz gives a cycle >time of 2.15983. That is a difference of 32.17 ps. 32 picoseconds is >pretty little. Is the accuracy of the measurements enough to deal with >such small times?
I believe that, as someone else has pointed out, it's just for marketing.
It's a small round up to call it a DS10 470MHz instead of a DS10 463MHz.
>All that said, I do not know if the stated 470 MHz is actually true. >Anyone checked the actual crystal or clock generator circuitry to see >what is actually the frequency base?
I suspect that it's far easier to accurately measure the clock speed than
it is to try to measure the zero-crossings accurately for cycle-time. As
you know, they're just reciprocals of each other. How far do you want to
carry out the decimal???
-- VAXman- A Bored Certified VMS Kernel Mode Hacker VAXman(at)TMESIS(dot)ORG
Well I speak to machines with the voice of humanity.
In comp.os.vms VAXman- wrote:
> I suspect that it's far easier to accurately measure the clock speed than
> it is to try to measure the zero-crossings accurately for cycle-time.
Just curious -- I was wondering about that: isn't the cpu driven by
an (onchip or onboard?) oscillator of some sort? If that's the same
oscillator that drives the clock, then it's always going to measure
the "correct number" (i.e., however many cycles it's programmed to
count as a second) -- you can't know if your clock is running slow
by looking at that same clock.
-- John Forkosh ( mailto: j...@f.com where j=john and f=forkosh )
In article <jfh83v$35...@reader1.panix.com>, JohnF <j...@please.see.sig.for.email.com> writes:
>In comp.os.vms VAXman- wrote:
>> I suspect that it's far easier to accurately measure the clock speed than
>> it is to try to measure the zero-crossings accurately for cycle-time.
>Just curious -- I was wondering about that: isn't the cpu driven by
>an (onchip or onboard?) oscillator of some sort? If that's the same
>oscillator that drives the clock, then it's always going to measure
>the "correct number" (i.e., however many cycles it's programmed to
>count as a second) -- you can't know if your clock is running slow
>by looking at that same clock.
Some are; some are not. I recall when upgrading my AlphaStation-200 4/166
to an AlphaStation-200 4/233 that not only was its Alpha chip replaced but
it also required a clocking module replacement.
-- VAXman- A Bored Certified VMS Kernel Mode Hacker VAXman(at)TMESIS(dot)ORG
Well I speak to machines with the voice of humanity.
> In article<jfh83v$35...@reader1.panix.com>, JohnF<j...@please.see.sig.for.email.com> writes:
>> In comp.os.vms VAXman- wrote:
>>> I suspect that it's far easier to accurately measure the clock speed than
>>> it is to try to measure the zero-crossings accurately for cycle-time.
>> Just curious -- I was wondering about that: isn't the cpu driven by
>> an (onchip or onboard?) oscillator of some sort? If that's the same
>> oscillator that drives the clock, then it's always going to measure
>> the "correct number" (i.e., however many cycles it's programmed to
>> count as a second) -- you can't know if your clock is running slow
>> by looking at that same clock.
> Some are; some are not. I recall when upgrading my AlphaStation-200 4/166
> to an AlphaStation-200 4/233 that not only was its Alpha chip replaced but
> it also required a clocking module replacement.
There will be clock multiplier / pll and routing circuitry on chip, but all micros
i've ever seen are clocked from an external oscillator, usually a dil crystal
oscillator module for accuracy and stability.
Have never heard of a crystal oscillator on chip, though many embedded micros have
a fixed frequency, moderate stability oscillator on chip for cost sensitive
applications...
Could it be that one department was told that model would be 470mhz so
they built OS level config files with that model at 470, but when the
chip actually shipped it wa 463 ?
JF Mezei <jfmezei.spam...@vaxination.ca> wrote:
> Could it be that one department was told that model would be 470mhz so
> they built OS level config files with that model at 470, but when the
> chip actually shipped it wa 463 ?
The DS10 was marketed as having 466MHz and that's roughly what my DS10
and the DS10ls had. The larger model was marketed as a 600 but had in
fact 617MHz.
No idea what VMS is thinking it's reporting.
>> Could it be that one department was told that model would be 470mhz so
>> they built OS level config files with that model at 470, but when the
>> chip actually shipped it wa 463 ?
>The DS10 was marketed as having 466MHz and that's roughly what my DS10
>and the DS10ls had. The larger model was marketed as a 600 but had in
>fact 617MHz.
>No idea what VMS is thinking it's reporting.
If it was marketing, they were probably using WEENDOZE on Pentiums at
the time. It's very likey that it's a result of the Pentium's highly
precise floating point math. ;)
-- VAXman- A Bored Certified VMS Kernel Mode Hacker VAXman(at)TMESIS(dot)ORG
Well I speak to machines with the voice of humanity.
> In article<20120122214212.09ddd...@walker.schlensman.homeunix.net>, Marc Schlensog<mschlens+n...@gmail.com> writes:
>> On Sun, 22 Jan 2012 14:27:36 -0500
>> JF Mezei<jfmezei.spam...@vaxination.ca> wrote:
>>> Could it be that one department was told that model would be 470mhz so
>>> they built OS level config files with that model at 470, but when the
>>> chip actually shipped it wa 463 ?
>> The DS10 was marketed as having 466MHz and that's roughly what my DS10
>> and the DS10ls had. The larger model was marketed as a 600 but had in
>> fact 617MHz.
>> No idea what VMS is thinking it's reporting.
> If it was marketing, they were probably using WEENDOZE on Pentiums at
> the time. It's very likey that it's a result of the Pentium's highly
> precise floating point math. ;)
It was the FDIV instruction that had a problem.
And that was back in 1994. Some years before the DS10 (when DS10 hit
the streets Intel were at Pentium III).
>On 1/22/2012 5:14 PM, VAXman- @SendSpamHere.ORG wrote:
>> In article<20120122214212.09ddd...@walker.schlensman.homeunix.net>, Marc Schlensog<mschlens+n...@gmail.com> writes:
>>> On Sun, 22 Jan 2012 14:27:36 -0500
>>> JF Mezei<jfmezei.spam...@vaxination.ca> wrote:
>>>> Could it be that one department was told that model would be 470mhz so
>>>> they built OS level config files with that model at 470, but when the
>>>> chip actually shipped it wa 463 ?
>>> The DS10 was marketed as having 466MHz and that's roughly what my DS10
>>> and the DS10ls had. The larger model was marketed as a 600 but had in
>>> fact 617MHz.
>>> No idea what VMS is thinking it's reporting.
>> If it was marketing, they were probably using WEENDOZE on Pentiums at
>> the time. It's very likey that it's a result of the Pentium's highly
>> precise floating point math. ;)
>It was the FDIV instruction that had a problem.
>And that was back in 1994. Some years before the DS10 (when DS10 hit
>the streets Intel were at Pentium III).
You should be a sitdown comedian; you have no sense of humor.
-- VAXman- A Bored Certified VMS Kernel Mode Hacker VAXman(at)TMESIS(dot)ORG
Well I speak to machines with the voice of humanity.
>>> Could it be that one department was told that model would be 470mhz so
>>> they built OS level config files with that model at 470, but when the
>>> chip actually shipped it wa 463 ?
>>The DS10 was marketed as having 466MHz and that's roughly what my DS10
>>and the DS10ls had. The larger model was marketed as a 600 but had in
>>fact 617MHz.
>>No idea what VMS is thinking it's reporting.
A single crystal oscillator is used to generate the timing for the CPU,
memory system, and external bus. The external bus at that time was the
PCI bus. The PCI bus is required to operate at 33 MHz (actually
33.333... MHz), no more and no less. More modern busses all operate
at multiples of 33 MHz. Thus, in order to have all subsystems
synchronized, the CPU and memory must operate at multiples of 33 MHz.
This remains true to this day, for x86 computers as well as Alphas.
The DS10/466 actually runs at 466.666... MHz. The DS10/600 actually
runs at 600.0 MHz. Any other claimed frequencies are due to measurement
error, calculation error, and/or crystal tolerances.
> SDA> CLUE CONFIGURATION
> System Configuration:
> ---------------------
> System Information:
> System Type AlphaServer DS10 470 MHz Primary CPU ID 0.
> Cycle Time 2.16 nsec (463 MHz) Pagesize
> 8192 Byte
> --------------------------------[ EOF ]--------------------------------
> To other DS10 users: Has this ever happened to you? Anyway, I wonder
> where and how this could have happened.
> - MG
For what it's worth here are a couple of values from my systems:
clock speeds in
MHz nsec
marketing sho cpu clue
config cycle time
DS10 466 463
463 2.16
DS20E 666 667
667 1.50
AS1200 5/533 533 532
532 1.88
AS1200 5/400 400 400
400 2.50
XP1000 500 500
500 2.00
> In article<4f1c8e83$0$294$14726...@news.sunsite.dk>, =?ISO-8859-1?Q?Arne_Vajh=F8j?=<a...@vajhoej.dk> writes:
>> On 1/22/2012 5:14 PM, VAXman- @SendSpamHere.ORG wrote:
>>> In article<20120122214212.09ddd...@walker.schlensman.homeunix.net>, Marc Schlensog<mschlens+n...@gmail.com> writes:
>>>> On Sun, 22 Jan 2012 14:27:36 -0500
>>>> JF Mezei<jfmezei.spam...@vaxination.ca> wrote:
>>>>> Could it be that one department was told that model would be 470mhz so
>>>>> they built OS level config files with that model at 470, but when the
>>>>> chip actually shipped it wa 463 ?
>>>> The DS10 was marketed as having 466MHz and that's roughly what my DS10
>>>> and the DS10ls had. The larger model was marketed as a 600 but had in
>>>> fact 617MHz.
>>>> No idea what VMS is thinking it's reporting.
>>> If it was marketing, they were probably using WEENDOZE on Pentiums at
>>> the time. It's very likey that it's a result of the Pentium's highly
>>> precise floating point math. ;)
>> It was the FDIV instruction that had a problem.
>> And that was back in 1994. Some years before the DS10 (when DS10 hit
>> the streets Intel were at Pentium III).
> You should be a sitdown comedian; you have no sense of humor.
Maybe a bit.
But it often get distracted if by some "facts" that does not add up.
VAXman- @SendSpamHere.ORG wrote:
> In article <20120122214212.09ddd...@walker.schlensman.homeunix.net>, Marc Schlensog <mschlens+n...@gmail.com> writes:
>> On Sun, 22 Jan 2012 14:27:36 -0500
>> JF Mezei <jfmezei.spam...@vaxination.ca> wrote:
>>> Could it be that one department was told that model would be 470mhz so
>>> they built OS level config files with that model at 470, but when the
>>> chip actually shipped it wa 463 ?
>> The DS10 was marketed as having 466MHz and that's roughly what my DS10
>> and the DS10ls had. The larger model was marketed as a 600 but had in
>> fact 617MHz.
>> No idea what VMS is thinking it's reporting.
> If it was marketing, they were probably using WEENDOZE on Pentiums at
> the time. It's very likey that it's a result of the Pentium's highly
> precise floating point math. ;)
I thought it was the 386 that had the "highly precise floating point math"
It was a disgrace to see Intel's response to such, in comparison to DEC's response to the 11/750 floating point issue.
> VAXman- @SendSpamHere.ORG wrote:
>> In article <20120122214212.09ddd...@walker.schlensman.homeunix.net>,
>> Marc Schlensog <mschlens+n...@gmail.com> writes:
>>> On Sun, 22 Jan 2012 14:27:36 -0500
>>> JF Mezei <jfmezei.spam...@vaxination.ca> wrote:
>>>> Could it be that one department was told that model would be 470mhz so
>>>> they built OS level config files with that model at 470, but when the
>>>> chip actually shipped it wa 463 ?
>>> The DS10 was marketed as having 466MHz and that's roughly what my DS10
>>> and the DS10ls had. The larger model was marketed as a 600 but had in
>>> fact 617MHz.
>>> No idea what VMS is thinking it's reporting.
>> If it was marketing, they were probably using WEENDOZE on Pentiums at
>> the time. It's very likey that it's a result of the Pentium's highly
>> precise floating point math. ;)
> I thought it was the 386 that had the "highly precise floating point math"
No. It was/is the original Pentium that have the floating point bug. Thus all the funny jokes about why it wasn't called the 80586 and so on...
