Difficulty with a Makefile

[Tobiah]

Hi,

I hope this isn't too off topic. If so, is there
a better place for this?

I'm having trouble expressing something in this
Makefile:

###########################

all: master.wav
echo done.

master.wav: slide.wav piano.wav
echo

%.wav: %.orc %.sco orc_header
csound $*.orc $*.sco -o $@

##########################

I want master.wav to be built using the automatic
target '%.wav', but at the same time I want to express
it's dependency on slide.wav and piano.wav. The way
it is now of course, I only get an 'echo'. I'm trying
to avoid having to express the csound command in two
places.

So can I express dependencies for a file, while still
having it make use of an automatic target?

Thanks,

Tobiah

[Seebs]

On 2009-11-09, Tobiah <to...@rcsreg.com> wrote:
> I hope this isn't too off topic. If so, is there
> a better place for this?

Probably.

> So can I express dependencies for a file, while still
> having it make use of an automatic target?

I believe this can be done by not providing any production rules -- no
following lines starting with tabs, that is.

-s
--
Copyright 2009, all wrongs reversed. Peter Seebach / usenet...@seebs.net
http://www.seebs.net/log/ <-- lawsuits, religion, and funny pictures
http://en.wikipedia.org/wiki/Fair_Game_(Scientology) <-- get educated!

[Ben Finney]

Tobiah <to...@rcsreg.com> writes:

> I'm having trouble expressing something in this Makefile:

I'll assume you're using GNU make.

> all: master.wav
> echo done.
>
> master.wav: slide.wav piano.wav
> echo
>
> %.wav: %.orc %.sco orc_header
> csound $*.orc $*.sco -o $@
>

To have a rule with no commands, only dependencies, just don't put any
commands for the rule:

=====
all: master.wav

master.wav: slide.wav piano.wav

%.wav: %.orc %.sco orc_header
csound $*.orc $*.sco -o $@

=====

--
\ “It's up to the masses to distribute [music] however they want |
`\ … The laws don't matter at that point. People sharing music in |
_o__) their bedrooms is the new radio.” —Neil Young, 2008-05-06 |
Ben Finney

[Tobiah]

> To have a rule with no commands, only dependencies, just don't put any
> commands for the rule:
>
> =====
> all: master.wav
>
> master.wav: slide.wav piano.wav
>
> %.wav: %.orc %.sco orc_header
> csound $*.orc $*.sco -o $@
> =====

Thanks guys!

I'll try that tonight after work. This seems
clear enough, but I just couldn't visualize it.

Tobiah

[Kaz Kylheku]

On 2009-11-09, Tobiah <to...@rcsreg.com> wrote:

> Hi,
>
> I hope this isn't too off topic. If so, is there
> a better place for this?
>
> I'm having trouble expressing something in this
> Makefile:
>
> ###########################
>
>
> all: master.wav
> echo done.
>
> master.wav: slide.wav piano.wav
> echo
>
> %.wav: %.orc %.sco orc_header
> csound $*.orc $*.sco -o $@
>
> ##########################

The problem here is that the true dependency between the .wav files
is hidden in the .orc files. The build rule doesn't actually mention
any .wav files being inputs.

This is analogous to only a .c file knowing which header files it includes,
directly or indirectly.

You don't want to maintain these kinds of dependencies by hand in your
makefile, but auto generate them into a dependency makefile:

deps.mk:
# your rule to scan .orc files and spit out dependencies goes here

-include deps.mk

Since deps.mk is being included into your makefile, make runs the deps.mk
rule if deps.mk does not exist.

Yes, rules with empty bodies are used to express dependencies. That's how
dependency make include files work.

I know it's a long shot, but maybe csound has an option to generate
dependencies? If not, it should.

> So can I express dependencies for a file, while still
> having it make use of an automatic target?

Exactly like C dependencies, which often go into separate include files:

foo.o: foo.c foo.h bar.h ../include/lib.h
bar.o: bar.c bar.h ../include/lib.h
... etc

In some large projects, the dependencies are even put into one include
makefile per target. I.e. the dependencies for a path/to/foo.c may
go into path/to/foo.d. The top Makefile includes all of the .d files.

The .d files are maintained using some special compiler command which
processes the source to gathers the dependencies and spit them out in
make format. This is an advantage because if a file changes, the dependencies
can to be regenerated for just that file.