Floating point argument reduction

[Mike B.]

Hi!

You might know the following sentence from the TIS-ACWG (p.155) about
the 'remainder instruction sequence'.

“The value of FBreg’ will be the quotient used to produce the
remainder when (FBreg.exp – FAreg.exp) is <=20 for single length and
<=30 for double length operands.”

I took a while to realize where this numbers are emerging from. The
problem was that there are two different limiters.

The 30 for double length has his origin in the maximum number of
iterations an fpremfirst instruction will do: 32. If the exponent
difference is higher, additional fpremstep instructions are required.
As there is no information transfer about the remainder from the first
to the adjacent instructions, the result will become useless.

The 20 for single length comes from the size of the single length
mantissa which is 23 bit long. If you make more iteration (but less
than 32) the transputer will cut off the higher bits, when the
remainder will be stored in FBreg.

One example:

FAreg=0x365FA7F8
FBreg=0x44F5C334

FAreg’=0x35652FE0
FBreg’=0x4C4A6D1F

FBreg’ should be 0x4E0CA6D2 which is not exact (because you must round
the result) but much more accurate.

So, if you ever want to use the quotient from the remainder
instruction sequence: Pay tribute to these boundaries!

BTW: The maximum number of fpremstep is 8 for single and 65!!! for
double.
So 0x7FE0000000000000 REM 0x0000000000000001 may take a while
(~145us@20MHz).

-Mike