Re: 6809 IO board -- need information
Geo
>What I am looking for is a simple "reference design" of a 6809 CPU
>with minimal RAM/ROM, 6840, 6850, and 6821 ICs. Something as simple
>as possible to illustrate the basics of them working as a system.
>Yes, I have the datasheets already but would like a more "system
>level" view.
>
Circuits of a multi-board 6809 design:-
http://www.retro.co.za/6809/
and a single board:-
http://www.retro.co.za/6809/microbox.html
should be able to pick the general points out of those.
--
Geo
Dave Dunfield
>Hi All! I would like to design an IO mezzanine board for the N8VEM
>6809 host processor board. The intent is to add enough IO so that the
>6809 host processor can be used as a stand alone system. It would
>still have its ECB interface to access the rest of the N8VEM system
>but could operate on its own more independently.
>At least for now, my goals for the 6809 IO board would be to add 4
>things:
>1. power interface; probably a 9V DC adapter (wall wart) and 7805 type
>regulator
>2. MC6840 programmable timer module, connected to the interrupt system
>in some manner.
>3. MC6850 ACIA (serial)
>4. MC6821 PIA (parallel)
>The board would entail pulling bus signals from the 6809 host
>processor mezzanine interface and assorted decode logic -- possibly
>including bus transceivers and buffers for additional expansion.
>I would like to keep this as simple as possible to allow full
>implementation of a serial debug monitor with breakpoint support.
>Apparently the ASSIST09 debug monitor requires a MC6840 connected to
>NMI for breakpoint capability.
It's probably for single-step capability - you set a timer to trip NMI one
cycle after the user instruction launches - breakpoints would need an
address bus comparator (hw) or more simply, just insert an SWI at
the breakpoint address (means you can only breakpoint in RAM).
As I've mentioned before, I can give you a 6809 monitor which will
perform breakpoints and single-step without requiring any hardware
assist.
>What I am looking for is a simple "reference design" of a 6809 CPU
>with minimal RAM/ROM, 6840, 6850, and 6821 ICs. Something as simple
>as possible to illustrate the basics of them working as a system.
>Yes, I have the datasheets already but would like a more "system
>level" view.
>For example, what is the relationship if any between the 6840 and the
>6850? What sort of clock feeds the 6840 in terms of speed,
>interfacing a CPU with multiple IO devices, etc.
Is there a reason you want to use a 6850? -- I tended to use 6551's
and 6552's on my 68xx systems - interfaces easily and provides a
built in baud-rate generator for all the common speeds.
>If anyone has any good clear examples I would much appreciate it if
>you could post some URLs or send me some information. Thanks and have
>a nice day!
My CUBIX system design is available on my site - but as noted above it
doesn't stick to motorola periphs. The mot stuff is very easy to glue together,
and IIRC there are suitable examples in the databooks.
Any chance of an FDC?
--
dave09@ Low-cost firmware development tools: www.dunfield.com
dunfield. Classic computer collection: www.classiccmp.org/dunfield
com
james
wrote:
|Hi All! I would like to design an IO mezzanine board for the N8VEM
|6809 host processor board. The intent is to add enough IO so that the
|6809 host processor can be used as a stand alone system. It would
|still have its ECB interface to access the rest of the N8VEM system
|but could operate on its own more independently.
|
|At least for now, my goals for the 6809 IO board would be to add 4
|things:
|
|1. power interface; probably a 9V DC adapter (wall wart) and 7805 type
|regulator
|2. MC6840 programmable timer module, connected to the interrupt system
|in some manner.
|3. MC6850 ACIA (serial)
|4. MC6821 PIA (parallel)
|
|The board would entail pulling bus signals from the 6809 host
|processor mezzanine interface and assorted decode logic -- possibly
|including bus transceivers and buffers for additional expansion.
|
|I would like to keep this as simple as possible to allow full
|implementation of a serial debug monitor with breakpoint support.
|Apparently the ASSIST09 debug monitor requires a MC6840 connected to
|NMI for breakpoint capability.
|
|What I am looking for is a simple "reference design" of a 6809 CPU
|with minimal RAM/ROM, 6840, 6850, and 6821 ICs. Something as simple
|as possible to illustrate the basics of them working as a system.
|Yes, I have the datasheets already but would like a more "system
|level" view.
|
|For example, what is the relationship if any between the 6840 and the
|6850? What sort of clock feeds the 6840 in terms of speed,
|interfacing a CPU with multiple IO devices, etc.
|
|If anyone has any good clear examples I would much appreciate it if
|you could post some URLs or send me some information. Thanks and have
|a nice day!
|
|Andrew Lynch
|==============
There is a version of ASSIT09 that has been rewritten to use a MC68681
DUART instead of the MC6840.
james