That sounds a lot like what I had in mind for extending one of my
own ECB-based systems. I have no experience with FLEX, though, but
OS/9 could also be ported. Eventually I'd like to build one board
for each kind of CPU I have lying around (6502, 68000, 8088).
Thanks for sharing
Jens
--
You can't out-sarcasm reality.
Hmmm.... Where can I find out more info on this system? In particular
how-to and how hard it is to target other (and probably more obscure)
processor types? As an example, I would be thinking of things like
PDP-11, VAX, IBM-1401, Univac-1100, Prime 50-Series and even IBM-360.
Got a lot of things on the agenda for retirement and just keep adding
to the list!! :-)
bill
--
Bill Gunshannon | de-moc-ra-cy (di mok' ra see) n. Three wolves
bill...@cs.scranton.edu | and a sheep voting on what's for dinner.
University of Scranton |
Scranton, Pennsylvania | #include <std.disclaimer.h>
The N8VEM project is here: http://n8vem-sbc.pbwiki.com/
This particular idea of an SBC with another CPU turns the host CPU
into slave mode to handle all I/O, just like the TRS-80 Model 16
did when switching from the Z80 to the 68000. I've been sketching
ideas about how to transfer data/commands/status information
between the CPUs, but since my main ECB-system hasn't been quite
functional for some time I haven't worked on that particular
project for a while (read: years).
> Got a lot of things on the agenda for retirement and just keep adding
> to the list!! :-)
That sounds oddly familiar, even though I've got at least another two
decades until retirement ;-)
Hi. I used to design 8 bit OS and tools (SDOS, SDBasic as Software
Dynamics)
for 6800/6809 machines.
The instruction sets on these guys is so simple that you should be able to
code
a C simulator in a few thousand lines at most, that likely outperforms the
original
chip. I'm just curious as to what your purpose in building hardware is.
-- IDB
I've designed a similar circuit around TTL-latches, delaying the -WR
line through a few leftover inverters. That got me a printer port with
a properly times -Strobe line.
To get this design to talk to another SBC the -Strobe sets the Busy
flag via half an LS74, which also acts as a "Data pending" signal for
the second SBC, which uses the -RD line from the data LS244 to reset
the Busy/Pending LS74.
Obviously the second half of the LS74 can be used for the other
direction. The Busy/Pending signals would also make nice status LEDs.
This is interesting. Lately I've been fascinated with the 6800 family,
especially the 6809/6309, brought on by trying to understand the code
in an old radio programmer. Now you're doing an SBC, and Vince Briel
is considering doing one.
Are you using a 6809, or a 6809E?
De
Hey Andrew,
Glad to see you are still producing projects - the 6809 is probably my
favorite 8-bit architecture, so it's always good to see it being kept
alive.
I've for a ton of 6809 code which might be useful to you, including a couple
of pretty decent monitors (simple hardware-debug monitor which uses NO
RAM - no even for a stack, and a fairly nice software debug monitor with
lots of goodies).
This board sounds like it would be a good candidate for my CUBIX OS.
I've added a "Information on CUBIX" link to my 6809 homebuilt page at:
www.classiccmp.org/dunfield/d6809/index.htm
Please check it out and see what you think.
"Ira Baxter" said:
>The instruction sets on these guys is so simple that you should be able to
>code a C simulator in a few thousand lines at most, that likely outperforms
>the original chip.
I've posted a PC based simulator for my 6809 homebult at the page
mentioned above, and yes it's much faster than the original machine.
Not the same however ... nothing beats the satisfaction you'll get from
building a working physical/tangible computer system with your own
hands.
Dave
--
dave09@ Low-cost firmware development tools: www.dunfield.com
dunfield. Classic computer collection: www.classiccmp.org/dunfield
com
|Hi Dennis! Thanks! I am using a 6809 since it has the internal clock
|generator circuit. I considered using a 6809E for a while but it
|requires some extra chips. The 6809E is more somewhat more powerful
|and easier to get though.
|
|Thanks and have a nice day!
|
|Andrew Lynch
|===============
MC6809 and MC6809E have the same instruction set. The MC6809 has a
built in limited DMA interface that can allow a peripheral to access
memory for upto 32 machine cycles.
There are some minor hardware differences but essentially they are the
same processor.
Hitachi made the HD6809/HD5809E processors that are HMOS chips that
are completely identical to the Motorola parts. They also made a CMOS
version HD6309/HD6309E chips that have extra registers and an
increased instruction set.
james
<old stuff snipped>
>The next step is to break the 6809 loop back test program into
>subroutines and start developing a simple ROM monitor program. If
>anyone has a small but useful 6809 monitor with character in/out
>subroutines please let me know. The whole thing has to fit in a 2K
>ROM so it has to be small.
$f800 to $ffff is the standard location
look at the s-bug listing etc here:-
http://www.swtpc.com/mholley/MP_09/MP_09_Index.htm
--
Geo
> I am not sure about the licencing on FLEX, CUBIX, or OS9 either so I need
> to investigate it
On FLEX and third party software copyrights here:
<http://flexusergroup.com/flexusergroup/fug7.htm>
--
> I think what I am going to
>do is start with the Motorola MIKBUG and study that debug monitor.
>I'll use it as a guide to write my own debug monitor. Since it is a
>Motorola reference document and if I am careful I should be able to
>make my own fairly easily using the Motorola standard. I assume they
>published it for that purpose; at least that's how I read the
>datasheet.
That is how I started many years back.
>Are there any free/open source 6809 debug monitors?
Just use the S-bug one - it does everything you need and I used it for years -
maybe with some slight mods to suit my hardware.
>I am not sure about the licencing on FLEX
No problem with Flex and I suggest that might be a good path to follow when
creating the hardware to keep all the UART and PIA addresses consistent.
You will get lots of support and information in the FUG. Also check out the 68
Micro Journal magazine of the era.
>The 6809 host processor ROM, which is really a DS1220 NVSRAM right
>now, is $F800-$FFFF and the IO page is $F000-$F7FF. The only thing in
>the IO page is the PIA so of the 2048 possible addresses, only 4 are
>used. I am thinking to add a RAM addressing latch so builders can use
>the 512Kx8 SRAM parts and page in the lower 32K page.
Flex used a fast (TTL) address translation rom for 64k page addressing (with a
hole for IO and ROM).
--
Geo