Emulated Saturn new opcodes
Claudio Lapilli
-----------------------
A long time ago Yoann Desir found that MASD in ROM 1.23 supports all
the new BUSCC opcodes.
Since nobody else bothered in continuing his work, I tried to compile
the information he found and add a little more that I have found
recently.
I saw several posts with spread and incomplete information, and none
of them were addressing the new capabilities of the emulated Saturn,
so I decided to post this one.
I hope this info will bring new light to all those old Saturn
assembler programmers that thought Saturn was obsolete. Now the old
Saturn can multiply, divide, raise a number to a power, calculate
reminders, rotate a specified number of bits, among other things.
If you like Saturn assembler programming, you better check this out!
I will use the terminology BUSCC number, where number goes from 01 to
FF and it goes coded in two nibbles immediately after the buscc code
itself. Remember to reverse the nibbles in the numbers, so they are
little endian (when I say code 01 I mean "80B10")
Notice that some opcodes need more than two nibbles (especially the
new arithmetic opcodes).
You can use the MASD name in you assembler code directly. No need to
remember any code or add the BUSCC word before.
Opcode MASD name Possible use
number
(in hex)
00 RPL2 Guessing--> Return to RPL but under which
conditions?
05 BEEP2 Guessing--> To use the beeper. Somebody is already
trying this one.
06 MOVEDN Well known MOVEDOWN routine
07 MOVEUP Well known MOVEUP routine
08 CRTMP Well known CREATETEMP routine
09 ???????? Unnamed, but it seems to use the beeper. See other
posts.
0A KEYDN Guessing--> To read the keyboard but I never tried
this one.
0B GOSLOW Guessing--> To switch to 12 MHz mode.
10 OFF Turn the calc off. Press ON will resume your
program.
11 GETTIME Returns in C.W a free running timer, in D.W a
countdown
timer, in B.W a timer that starts counting from
zero and
goes up. Disable all interrupts before calling or
it will
crash the calc.
12 SETTIME Guessing--> Opposite of GETTIME, but I never tried
this
13 RESETOS Any volunteers to try this one? Performs a ON-A-F
reset.
14 AUTOTEST Tests accessed through On-D
15 NATIVE? XX No idea. It uses 2 extra nibbles.
17 SERIAL "That command writes the serial number of the 49g+
into
DAT1 on 10 bytes (ascii coded). And the SERIAL ARM
command
is of course used inside the SERIAL romptr of the
256
devlib." Quoted from Yoann Desir.
28 HST=1.n Set individual bits to HST
29 HSCREEN Height of the screen in A.A. Thanks to Yoann
Desir.
2A WSCREEN Width of the screen in A.A. Thanks to Yoann Desir.
2B MIDAPP? Clears carry on an HP49G+. From Yoann Desir post.
2C BIGAPP? Sets carry in HP49G+. From Yoann Desir post.
30 CONFIGD Any idea? Maybe to config the new LCD display from
Saturn.
31 UNCONFIGD Guessing--> The opposite of CONFIGD :-)
32 REFRESHD Guessing--> Forces the Saturn emulator to refresh
the display
33 SETLNED Sets the header to C.A lines. Use C=0 to disable
the
new header.
34 SETOFFD Guessing--> Turn display off. Maybe required to
use CONFIGD.
38 ?HST=1.n -> Comparison/jump for the register HST
50 REMON Any idea?
51 REMOFF Any idea?
56 OUTBYT Guessing--> Control I/O ports directly?
60 ACCESSSD SD card. Not completely understood. Look for a
post from
Yoann Desir.
61 PORTTAG? Guessing--> Something with tagged ID's to store in
Port
memory
62 ???????? Still unnamed, look for the same post as ACCESSSD.
7F SETFLDn Any idea? It takes one extra nibble for the n
80 A=A.P This is a group of new opcodes that enhances the
old saturn
Now all the registers A, B, C and D can operate
with all
the others. Operations like A=D.A are allowed.
Same thing
with B=D.A.
81 A+A.P Same as before, now operations like A=A+D.A are
supported
82 A-A.P Same thing as before, subtractions are allowed
between
any register.
83 A*A.P The new Saturn can MULTIPLY!!!! try A=A*C.A in
MASD
84 A/A.P Yes! The new Saturn can divide too!!! Use A=A/C.A
in MASD
85 A%A.P Modulo (reminder) operator for the new Saturn.
Try A=A%C.A in MASD
86 A=~A.P Bit invert, same as A=-A-1.P except that it works
with crossed registers A=~B.A is valid.
87 A=-A.P Arithmetic negate a register, but works with
crossed
registers A=-B.A is valid.
88 A<A.P New opcode for bit rotation to the left,
like A=A<C.A (rotates C times)
89 A>A.P Bit rotation to the right, try A=A>C.A (rotates C
times)
8A A^A.P Raise to a power!!! Try A=A^C.A
EF ARMSYS Calls ARM code given in ARM address in C.loword
FF ARMSAT Calls ARM code given in Saturn address in C.loword
All the new Saturn opcodes (80 thru 8A) work with any register and
with any field, which makes the Saturn a more complete and robust CPU.
I encourage all of you out there to try each and all the opcodes, add
your knowledge to this list, correct all my mistakes and wrong guesses
and publish it again. Let's make a complete reference, OK?
Claudio
PS: Thanks to Yoann Desir and all the people who shares information.
D. Turbiner
-is the GOSLOW opcode what JYA meant misteriously as the clock operation routine?
REMON and REMOFF are also accessed by on+R and on+S. The light the comm arrow.
Maybe to control the calc from the outside?
Great work everybody!!!
Dimitri
cdla...@hotmail.com (Claudio Lapilli) wrote in message news:<f2095351.04081...@posting.google.com>...
Eric Smith
> REMON and REMOFF are also accessed by on+R and on+S. The light the comm arrow.
> Maybe to control the calc from the outside?
Yes, in remote mode the LCD bitmap is sent out the USB port, and key input
is accepted from it. Unfortunately the required protocol is not documented
anywhere, but perhaps it wouldn't be too hard to figure out.
Claudio Lapilli
The opcode A=A^C.A does not raise to a power. It does a XOR, which was
missing in the old Saturn.
Claudio
manjo
i just came back from vacation
Does MASD properly compiles the A=A^C mnemonic ?
manjo
"Claudio Lapilli" <cdla...@hotmail.com> wrote in message
news:f2095351.04082...@posting.google.com...
Claudio Lapilli
> Hi Claudio,
> i just came back from vacation
>
> Does MASD properly compiles the A=A^C mnemonic ?
>
> manjo
>
Yes it does, try this:
::
CODE
SAVE
LA(5) $AAAAA
LC(5) $F0F0F
A=A^C.A
GOSBVL DBUG.TOUCHE
LOADRPL
ENDCODE
;
Be careful when you execute it, press and release the key really fast
or you won't see the registers.
The last 5 nibbles in the A register should read 5A5A5.
Claudio
manjo
Great it works,
little about ARM code:
(i like the idea of having ARM code aligned to word boundary (or half-word
for thumb mode)
at the compile time or once code is compiled, i understand your FixSto works
very much like that.
about XOR:
That's realy nice, at first i thought it was only for A field, but it realy
works for any field
(tested with X) and it works nice.
even a short version: A^C (instead of A=A^C) is supported, realy nice !!!
(i'm writing my code this way -it is almost half the size in the calc and
easier to read)
thanks, this will help a lot
this prooved following:
somone did think about how to improove the Saturn, and since Saturn is
emulated...
manjo
"Claudio Lapilli" <cdla...@hotmail.com> wrote in message
news:f2095351.04082...@posting.google.com...
Claudio Lapilli
"manjo" <not-avail...@rocketmail.com> wrote in message news:<cgriuh$7g1$1...@ls219.htnet.hr>...
> Hello Claudio,
> Great it works,
>
Sure it does, I was very pleased to see the new Saturn doing divisions
and multiplying any field, it makes better saturn code.
> little about ARM code:
> (i like the idea of having ARM code aligned to word boundary (or half-word
> for thumb mode)
> at the compile time or once code is compiled, i understand your FixSto works
> very much like that.
>
You are right, the idea of FixSto is to align the code before we store
the library into memory, this way we don't need to align it every
time. Also, if we store the library in Flash, we obviously can't align
it everytime without copying to RAM, which is a waste of both time and
memory.
So far we have not released any ARM program in library format, but
this will be the usual format in the future.
> about XOR:
> That's realy nice, at first i thought it was only for A field, but it realy
> works for any field
> (tested with X) and it works nice.
> even a short version: A^C (instead of A=A^C) is supported, realy nice !!!
> (i'm writing my code this way -it is almost half the size in the calc and
> easier to read)
>
> thanks, this will help a lot
>
> this prooved following:
> somone did think about how to improove the Saturn, and since Saturn is
> emulated...
>
Yes! At least somebody bothered in improving the old Saturn. It's a
good "virtual" processor after all.
Claudio
manjo
It seems like they decided to transfer some ARM power directly to the Saturn
by
adding instructions that are not problematic to emulate with ARM as well as
most modern processors.
REALY nice, is it:
------------------
A*C (mul)
and
A/C (div)
-how's the result for division and multiply
-i hope it gives integer divsion and a reminder
can you confirm this?
P.S. too bad these instructions will make the G+ software uncompatible with
49G and
older machines, but it's time to move on anyway -am i right ?!
my 2 projects are on hold, GIF decoder and ARM parser, but i have some
enthusiasm and good will
to finish these two. i hope i'll get enough free time from time to time.
manjo
"Claudio Lapilli" <cdla...@hotmail.com> wrote in message
news:f2095351.04082...@posting.google.com...
manjo
i did test mul and div instructions, they work nice, although div
instruction doesn't give the reminder
however DIV seams to be broken in to two instructions
A/C and A%C
-where A%C is a remider of course.
So all toughether makes powerfull improvement to SATURN concept,
don't you just love the thing ?
thanks for the info,
manjo
===========================
Ideas for HP CALC DIVISION:
(you will see i have million ideas like this)
===========================
LD and LB would be nice improvements (loading constants in to B and D)
in fact it would be great if all working registers were equaly powerfull as
A and C
(this is not a problem to emulate)
consider the C+P+1 (very usefull instruction when sequentialy loading
variable length data from memory -length specified by P register of course),
imagine index addressing:
DATx+D=A
DATx+D=C
and of course
A=DATx+D
C=DATx+D
of course D would not be A field, but whole 64 bit, this way we could use
index addressing to address whole available memory area which (with 64 bit D
is "unlimited" -limited by ARM's address space of course) D1 and D2 could
become what is in x86 architecture
Segment registers.
"manjo" <not-avail...@rocketmail.com> wrote in message
news:cgtpn7$j4q$1...@ls219.htnet.hr...
Cyrille de Brébisson
You might also want to look at the:
SETFLD1 to SETFLD7 functions
SETFLD1 uses Cw to create a mask for the feild F1
for example:
LC FF00FF00FF00FF00 SETFLD1 will set the field F1 to contain the bits that
are set to 1 in Cw.
then, you can use the field F1 in most instructions as in:
A=A&C.F1
and all operations will be performed only on the bits that are set to 1 on
the field (the other will not be changed!!!!)
Some peoples realy put some good thoughts in this (and it's not me)!
cyrimme
"manjo" <not-avail...@rocketmail.com> wrote in message
news:cgtpn7$j4q$1...@ls219.htnet.hr...
manjo
this is so cool
they made progress with saturn
imagine desktop computer based on giga-saturn :)
thanks for info
manjo
"Cyrille de Brébisson" <cyr...@hp.com> wrote in message
news:4UmZc.9287$KQ3....@news.cpqcorp.net...