Another look at the Carte Blanche video

Alex Freed

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May 22, 2012, 6:56:05 PM5/22/12

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I got an HDMI board from Steve and decided to re-implement the video
portion of the CB configuration. The idea was to add a double hi-res
mode and output to HDMI.

What I have is not even close to a "product". Just a proof of concept.
The built configuration is video only and not very polished at that. If
interested take a look at http://alexfreed.com/FPGApple/CB2.html

The Verilog is naturally available to interested parties.

-Alex.

Vladimir Ivanov

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May 23, 2012, 10:34:02 AM5/23/12

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Hi Alex,

Seems you still have more time than me ...

Any BRAMs available to implement crude NTSC lookup tables?

2048 entries holding RGB data (x9?) should look like this:

http://www.softjunk.org/sw/apple2/ra2/files/screenshot/ntsc/bpp/swashbuckler-09.png

-- Vlad

Alex Freed

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May 23, 2012, 3:01:02 PM5/23/12

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On 5/23/2012 7:34 AM, Vladimir Ivanov wrote:
>
> 2048 entries holding RGB data (x9?) should look like this:

My design doesn't use any BRAM except for the font "ROM" for video. A
bit more work needed, but even SRAM (loaded from a disk or
initialization EPROM ) could be used for a look-up table. We use less
than 10% of the SRAM bandwidth.

-Alex.

Steve

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May 26, 2012, 11:53:24 AM5/26/12

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Very Cool! I take may hat off to you guy's. Thats DVI/HDMI digital
video from an Apple II. Ive posted the gerbers for the the PCB board
if anyone wants to knock up a few boards.

http://www.srkhdesigns.com/CBAVPB01.html

Schematics, code, stuff. Its all available. Im curious though, Id love
to to have HDMI/DVI from my Apple III (my only defence is, if I had a
reason it wouldnt be a hobby).

Steve

Vladimir Ivanov

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Jun 3, 2012, 6:15:04 AM6/3/12

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Good. A bit late answer, but I finally stole few minutes to generate 9-bit
wide lookup table if you want to experiment. I am just a csa2 lurker these
days.

http://www.softjunk.org/sw/apple2/ra2/files/screenshot/ntsc/bpp/tbl_ntsc9.h

9-bit wide shift register at 14 MHz fed with Apple II serial video. Goes
through lookup table #0 .. #3 depending on phase relation with 3.58 MHz
color carrier, i.e. 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3 ...

Each entry is R8G8B8 triplet, which you should reduce to R3G3B3 or
similar to fit nicely in a single 2048x9 BRAM.

Example:
Serial video is 00110011011001100....
lookup table #0 with 001100110 -> output pixel 0
lookup table #1 with 011001101 -> output pixel 1
lookup table #2 with 110011011 -> output pixel 2
lookup table #3 with 100110110 -> output pixel 3
... repeat for the whole line ...

And the few points of caution:
1) I can't remember vector direction, so just try both, i.e. whether
shifter is clocked left or right
2) lookup entry gives middle pixel value for a 9-bit wide vector, like
this "xxxxXxxxx", so allow for some spare pixels on left and right edge of
screen
3) HGR and DHGR have different start phases with respect to color
carrier, so take this into account as well or simply do DHGR always

1) and 3) give total of 8 permutations to try, in the worst case.

Some excuses in advance if I messed up something.

-- Vlad