Senior Prom logic
EricN
on building a board. From the one photograph I can find, it looks
like they used a single 74LS00 quad 2-input NAND gate chip, which
seems odd since the Senior Prom docs claim debouncing functionality.
It seems to me like you would need the 74LS00 and a S-R flip flop chip
to do the logic plus debouncing.
Here are the Senior Prom states:
Switch looks to be SPDT with common open:
Position 1: Normal Apple ROM code active
Position 2 (middle): Normal Apple ROM code active until you press the
NMI interrupt, then Sr. Prom code is activated and NMI is generated
Position 3; Senior Prom code active
I know you can do an S-R flip flop with two NAND gates but the truth
table I worked out seems to need four or five NAND gates just to
handle the logic.
Truth table I created is here for reference:
Inputs:
Momentary contact switch = M
Senior Prom signal = S
Normal Apple signal = A
Outputs:
N = NMI
E = EPROM signal that toggles A13 high or low
M P A N E
----------- -------
0 0 0 1 0
0 0 1 1 0
0 1 0 1 1
0 1 1 x x
1 0 0 0 1
1 0 1 1 0
1 1 0 0 1
1 1 1 x x
Thanks,
Eric
A2Aviator
again with a few changes, mainly EPROM sizes and perhaps //c internal
compatible as well.
EricN
I'm enjoying reverse engineering this project but nice to know
somebody else is working on this.
I think I've figured it out now. The Sr. Prom guys did a very elegant
minimalist solution that can be done with exactly two flip flops or
four NAND gates. I'll post schematics when I've verified
functionality.
Eric
A2Aviator
reconfiguration for larger ROM sizes, so that more ROM images can be
onboard and thats mostly because the //c has more ROMs than the //e,
release wise.
But in theory, you can have a un/enhanced and mod ROM on a //e this
way, and maybe mod ROM of two varieties so you could have either un/
enhanced in mod ROM too.
Dutch
> On Dec 30, 12:54 am, A2Aviator <a2avia...@gmail.com> wrote:
>
> > It's been a little longer than I desired .. but I'm creating them
> > again with a few changes, mainly EPROM sizes and perhaps //c internal
> > compatible as well.
>
> I'm enjoying reverse engineering this project but nice to know
> somebody else is working on this.
>
>
Hi Eric,
If you would be interested, my own design is located here:
http://picasaweb.google.com/regenerator6551/SeniorProm3#5391511874459909522
and
http://picasaweb.google.com/regenerator6551/SeniorProm3#5391511881784278434
and the schematic is here:
http://picasaweb.google.com/regenerator6551/SeniorProm3#5421280293233199954
Good Luck,
-Dutch
EricN
> and the schematic is here:
>
>
> Good Luck,
>
> -Dutch
Thanks Dutch. Your schematic pointed out an error in my design. I
had thought that it was ok to insert pin 26 (A13) directly into the
Apple motherboard. It turns out there there is power to that pad and
the Apple won't boot if you're trying to drive that pad high or low to
enable/disable the Sr Prom banks of memory. Now I understand why the
Sr. Prom guys shifted the EPROM sockets the way they did. My Sr. Prom
is up and running now - woo!
I also believe I have figured out the original logic used with the
74LS00 which does the switching and debouncing using only three NAND
gates. My hat is off to the Sr. Prom engineers for implementing such
an elegant minimalist logic solution. The schematic is here:
http://www.neilsonhart.com/seniorprom/SeniorPromSchem.bmp
Eric
Alex Freed
>
> I also believe I have figured out the original logic used with the
> 74LS00 which does the switching and debouncing using only three NAND
> gates. My hat is off to the Sr. Prom engineers for implementing such
> an elegant minimalist logic solution. The schematic is here:
> http://www.neilsonhart.com/seniorprom/SeniorPromSchem.bmp
>
> Eric
>
There is a little problem with this design - the NMI signal is supposed
to be open collector. Only important if there is another board that can
also assert the NMI signal. To be clean the LS00 should be replaced by a
74LS38 and a resistor (say 10k) added between pin 6 and +5V.
BTW with a 74LS00 part R4 serves no purpose.
-Alex.
--- news://freenews.netfront.net/ - complaints: ne...@netfront.net ---
EricN
> EricN wrote:
>
> > I also believe I have figured out the original logic used with the
> > 74LS00 which does the switching and debouncing using only three NAND
> > gates. My hat is off to the Sr. Prom engineers for implementing such
> > an elegant minimalist logic solution. The schematic is here:
> >http://www.neilsonhart.com/seniorprom/SeniorPromSchem.bmp
>
> > Eric
>
> There is a little problem with this design - the NMI signal is supposed
> to be open collector. Only important if there is another board that can
> also assert the NMI signal. To be clean the LS00 should be replaced by a
> 74LS38 and a resistor (say 10k) added between pin 6 and +5V.
>
> BTW with a 74LS00 part R4 serves no purpose.
>
properly after firing the NMI (the springback to normal position is
the error) so I'm going with Dutch's flip flop design with open
collector outputs.
Thanks,
Eric
EricN
the enhanced //e? I have my sweet little Senior Prom working but I
only have the STD 3.01 version of firmware. I've scoured the web but
can't find a copy anywhere.
Thanks,
Eric
Dutch
I sent you an email with the images I used. I was unable to find
the enhanced version of the Senior Prom, so I mixed the enhanced //e
ROM with the unenhanced Senior Prom. It works well with the Senior
Prom 3 Utilities disk.
Dutch
EricN
state on my //e which is good, however, moving the switch to the
Senior Prom state will cause the system to drop into the monitor when
it should continue working until a CTRL-Reset is pressed. When I used
the original Apple ][ version of the Senior Prom, I was able to do
this, albeit I turned my system into an Apple ][ so your hybrid
firmware is a much better solution.
I'll put out a call for an Apple //e enhance version of Senior Prom.
Maybe someone out there will be able to provide a copy.
Eric
Dutch
> state on my //e which is good, however, moving the switch to the
> Senior Prom state will cause the system to drop into the monitor when
> it should continue working until a CTRL-Reset is pressed.
My experience is that it only breaks into the monitor when Applesoft
is active. I would expect this behavior. If my understanding is
correct the machine is in a loop waiting for input to the command
line, when the switch is moved to activate the Senior Prom, that code
disappears in mid-excution and is replaced by something unexpected,
hence the break. The Senior Prom manual says that the Applesoft code
was removed to accomodate its own function.
If anyone else can confirm or correct this assumption, please do.
-Dutch
EricN
> is active. I would expect this behavior. If my understanding is
> correct the machine is in a loop waiting for input to the command
> line, when the switch is moved to activate the Senior Prom, that code
> disappears in mid-excution and is replaced by something unexpected,
> hence the break. The Senior Prom manual says that the Applesoft code
> was removed to accomodate its own function.
I did a little more investigating and I can confirm that switching to
the SP state while a program is waiting for keyboard input is what
dropped me into the monitor, and it's expected behavior per the manual
(also happens during a BASIC program). If I switch over while the
program is loading or doing something else, I appear to be fine. So
all in all, I can say the Senior Prom design with your hybrid firmware
is functioning exactly as it should.
I would still love to get a copy of the official //e firmware of the
Senior Prom, just to look at the differences if any. I sent an email
to A2Aviator who is apparently an avid Senior Prom collector but
haven't heard anything back yet.
Eric
EricN
>So all in all, I can say the Senior Prom design with your hybrid firmware
> is functioning exactly as it should.
Just to close out this thread and the project, I've compiled the
schematics, software and all documentation and uploaded it to Asimov
for posterity. The file is located at pub/apple_ii/images/hardware/
senior_prom/SeniorProm301_STD_ENH.zip.
Eric