somewhere in the Yahoo os2ddprog group there is a posting by Daniela
Engert that I interpreted
that if you write to a memory mapped register, you always need to read
back from
the register so that any caching effects are circumvented.
Well, I am using the latest USB drivers that come with eCS. I have 3 onboard
OHCI host controller hubs (SiS chipset) and they never properly worked, some
ports were just not served by the hub(s), they appeared to be plain dead.
I thought I'd give it a try, took the latest publicly available DDK sources,
browsed to routine SetDWORD and added a readback call:
_SetDWORD PROC NEAR
itemData equ [bp+8]
itemAddress equ [bp+4]
enter 0,0
les bx,itemAddress ; load item address
mov eax,itemData ; load item data
mov es:[bx],eax ; set item data
mov eax,es:[bx] ; read back from mem. mapped reg to flush from cache
leave
ret
_SetDWORD ENDP
Now, my OHCI ports work OK. Is this now pure coincidence, sheer luck or
are the
latest USB host controller drivers more hosed up than what I can build
from the
latest DDK sources ?
P.S.: also posted this to the os2ddprog group but I thought there is
more traffic here.
Lars