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Message from discussion GNU Lesser Public License and Soft IP
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ajjc  
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 More options Oct 20 2009, 12:25 pm
Newsgroups: comp.lang.verilog, comp.lang.vhdl
From: ajjc <a...@optngn.com>
Date: Tue, 20 Oct 2009 09:25:56 -0700 (PDT)
Local: Tues, Oct 20 2009 12:25 pm
Subject: Re: GNU Lesser Public License and Soft IP
On Oct 19, 11:48 pm, Pieter Hulshoff <phuls...@xs4all.nl> wrote:

> glen herrmannsfeldt wrote:
> > I would say that you could use an LGPL verilog module in your
> > design in the same way one uses a C library routine when compiling
> > with GCC.  The LGPL is needed to allow distribution of GCC compiled
> > output.   If one modified the LGPL module then one would have
> > to release the source for that module, which might be okay.

> The main problem with the LGPL and hardware lies in clause 4d (seehttp://www.gnu.org/copyleft/lesser.htmlfor details). It's a clause
> that makes a lot of sense when applied to software, but none when
> applied to hardware. It's up to the copyright holders how to wish
> to apply this clause when it comes to hardware.

> Kind regards,

> Pieter Hulshoff

Yes, that is actually the key point.

"1) Use a suitable shared library mechanism for linking with the
Library. A suitable mechanism is one that (a) uses at run time a copy
of the Library already present on the user's computer system, and (b)
will operate properly with a modified version of the Library that is
interface-compatible with the Linked Version. "

My take on it, and IANAL, is that by having a reasonable library/API
interface, the intent of
section 4d is satisfied, through that type of firewall. You should be
able to replace the LGPL library with any other library that can use
that interface.
This will, I believe,  effectively give you
the license firewall desired and implied by the term "library".

The synthesis step is the compile step, and a "derivative work", the
mapped netlist is produced
by a compiler.  Up to this step, I believe you can argue that the
model is the same as the
software world.

Where you now do the place and route, bitstream download and run is
where the machine models and the copyright-based "derivative work" GPL/
LGPL licensing gets into new territory for hardware described by
textual models(e.g. HDL code) and many, many transformational programs
(e.g. place and route, partial reconfiguration, etc.). In fact, I
believe that multi-core machines will end up having this same
problem...interpreting the Von Neumann machine model magic of "static
linking/dynamic linking" with repect to what that means with new
machine models and modes of operation for the GPL/LGPL license
hierarchy.

As one of the other contributors in this thread mentioned, asking the
creators of the library for
reasonable permissions can stave off misinterpretations later on.

alan


 
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