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Open Source VHDL Verification Methodology
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HT-Lab
Jan 20, 2012, 9:18:49 AM1/20/12
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For those that haven't seen it,
http://www.aldec.com/en/solutions/functional_verification/os_vvm
Hans
www.ht-lab.com
http://www.aldec.com/en/solutions/functional_verification/os_vvm
Hans
www.ht-lab.com
hssig
Jan 24, 2012, 7:52:26 AM1/24/12
to
Hi,
I have tried the fifo example with Modelsim, the simulation performs
as expected.
In my opinion the adoption of coverage definition and collection
seems not that easy because there are some complex dependencies.
Nevertheless I will give a try in my next own testbench.
Cheers, hssig
I have tried the fifo example with Modelsim, the simulation performs
as expected.
In my opinion the adoption of coverage definition and collection
seems not that easy because there are some complex dependencies.
Nevertheless I will give a try in my next own testbench.
Cheers, hssig
JimLewis
Jan 25, 2012, 3:47:12 PM1/25/12
to
Also don't miss that there will be a webinar on Thursday Jan 26.
Go to: http://www.aldec.com/en/events
The presentation examples will be similar to the examples
in the user guides for the individual packages. Currently
the user guides are only available at:
http://www.synthworks.com/downloads
@hssig
incrementally, and hence, you can create as complicated
coverage model as you are willing to write.
If you find a problem that you don't think it can
handle, drop me a line. I have numerous revision
plans for the package, maybe we will learn that some
are more important than others.
Best Regards,
Jim
SynthWorks VHDL Training
Go to: http://www.aldec.com/en/events
The presentation examples will be similar to the examples
in the user guides for the individual packages. Currently
the user guides are only available at:
http://www.synthworks.com/downloads
@hssig
> In my opinion the adoption of coverage definition and
> collection seems not that easy because there are some
> complex dependencies.
With OS-VVM/CoveragePkg, coverage can be modeled
> collection seems not that easy because there are some
> complex dependencies.
incrementally, and hence, you can create as complicated
coverage model as you are willing to write.
If you find a problem that you don't think it can
handle, drop me a line. I have numerous revision
plans for the package, maybe we will learn that some
are more important than others.
Best Regards,
Jim
SynthWorks VHDL Training
hssig
Jan 30, 2012, 4:49:46 AM1/30/12
to
Thank you for the link.
Cheers, hssig
Cheers, hssig
HT-Lab
Feb 27, 2012, 6:34:53 AM2/27/12
to
http://testosvvm.webs.com/
www.osvvm.org is still redirected to Aldec but it looks like there is
some effort going on to make it EDA vendor neutral (which we obviously
something we want).
Regards,
Hans.
www.ht-lab.com
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