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  <channel>
  <title>comp.lang.asm.x86 Google Group</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86</link>
  <description>Bulletin Board and Q&amp;amp;A for x86 assembly language topics. (Moderated)</description>
  <language>en</language>
  <item>
  <title>Re: Debugger for AMD64?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/d660dfafb775e181?show_docid=d660dfafb775e181</link>
  <description>
  Windows .. there is CDB as well - but I just want to open the debugger, type &lt;br&gt; &amp;quot;a&amp;quot;, do my own thing, hit &amp;quot;t&amp;quot; a couple to see the results. &lt;br&gt; I&#39;ll search for that.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/d660dfafb775e181?show_docid=d660dfafb775e181</guid>
  <author>
  t...@is.invalid
  (David)
  </author>
  <pubDate>Tue, 05 Jan 2010 14:46:52 UT
</pubDate>
  </item>
  <item>
  <title>Re: Debugger for AMD64?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/94d721c206a9aed3?show_docid=94d721c206a9aed3</link>
  <description>
  On Jan 4, 2:25 pm, &amp;quot;BGB / cr88192&amp;quot; &amp;lt;cr88...@MUNGED.microcosmotalk .com&amp;gt; &lt;br&gt; wrote: &lt;br&gt; Other Microsoft debuggers (console) are: &lt;br&gt; NTSD, CDB and KD. &lt;br&gt; NTSD is in \windows\system32 on WinXP. &lt;br&gt; See more here: &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://msdn.microsoft.com/en-us/library/cc267445.aspx&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; Alex
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/94d721c206a9aed3?show_docid=94d721c206a9aed3</guid>
  <author>
  alexfrun...@munged.microcosmotalk.com
  (Alexei A. Frounze)
  </author>
  <pubDate>Tue, 05 Jan 2010 08:10:04 UT
</pubDate>
  </item>
  <item>
  <title>Re: Debugger for AMD64?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/05f72b7423c8e396?show_docid=05f72b7423c8e396</link>
  <description>
  Sztacheta - jozeksztacheta wrote... but the clax86 moderation software &lt;br&gt; ate his post (for some reason) &lt;br&gt; Try FDBG &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://feryno.host.sk/&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; Sorry to have dropped your post - hope I&#39;ve got it right! Thanks! &lt;br&gt; Best, &lt;br&gt; Frank
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/05f72b7423c8e396?show_docid=05f72b7423c8e396</guid>
  <author>
  fbkot...@munged.microcosmotalk.com
  (Frank Kotler)
  </author>
  <pubDate>Mon, 04 Jan 2010 22:49:21 UT
</pubDate>
  </item>
  <item>
  <title>Re: Debugger for AMD64?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/84e4e11f07cd7a44?show_docid=84e4e11f07cd7a44</link>
  <description>
  for which OS?... &lt;br&gt; if Windows, I am using WinDbg, but granted this is not a command-line &lt;br&gt; debugger. &lt;br&gt; still has support for disassembly, ... &lt;br&gt; for Linux, there is GDB... &lt;br&gt; I think there may be a Win64 port of GDB by now, but I have not checked. &lt;br&gt; I forget where exactly, but I think there was also a command-line debugger
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/84e4e11f07cd7a44?show_docid=84e4e11f07cd7a44</guid>
  <author>
  cr88...@munged.microcosmotalk.com
  (BGB / cr88192)
  </author>
  <pubDate>Mon, 04 Jan 2010 22:25:16 UT
</pubDate>
  </item>
  <item>
  <title>Debugger for AMD64?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/965e362526297476?show_docid=965e362526297476</link>
  <description>
  Anyone know of a AMD64 compatible symdeb/debug (command line) type debugger? &lt;br&gt; I use them all the time to test instruction results. For i386 I use ddeb, &lt;br&gt; but don&#39;t know of an AMD64 version?
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/34c099b1a87fd057/965e362526297476?show_docid=965e362526297476</guid>
  <author>
  t...@is.invalid
  (David)
  </author>
  <pubDate>Mon, 04 Jan 2010 20:10:27 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/9db069ae715fe163?show_docid=9db069ae715fe163</link>
  <description>
  I&#39;m not even sure you can say &amp;quot;commercially obsolete&amp;quot;. The ARM is the &lt;br&gt; highest-volume 32-bit (or more) processor in the world by a very large &lt;br&gt; margin, with approximately 1,500,000,000 per year being shipped &lt;br&gt; currently (yes, that&#39;s one-and-a-half billion!), mostly going into &lt;br&gt; cellphones. &lt;br&gt; Richard. &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.rtrussell.co.uk/&quot;&gt;[link]&lt;/a&gt;
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/9db069ae715fe163?show_docid=9db069ae715fe163</guid>
  <author>
  n...@munged.microcosmotalk.com
  (Richard Russell)
  </author>
  <pubDate>Mon, 04 Jan 2010 11:18:38 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/2c3e277b18b0cc38?show_docid=2c3e277b18b0cc38</link>
  <description>
  RISC &lt;br&gt; per &lt;br&gt; It is accurate. &lt;br&gt; True too, but that wasn&#39;t my point. &lt;br&gt; &amp;quot;per CPU clock&amp;quot; too was my point. &lt;br&gt; If one averages CISC work per instruction to a per clock basis so that they &lt;br&gt; can be compared with RISC, CISC instructions do more work per clock than &lt;br&gt; RISC. That was part of the reason why RISC failed. The conjecture that
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/2c3e277b18b0cc38?show_docid=2c3e277b18b0cc38</guid>
  <author>
  do_not_h...@nohavenot.cmm
  (Rod Pemberton)
  </author>
  <pubDate>Mon, 04 Jan 2010 11:17:55 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/f48eba436239e692?show_docid=f48eba436239e692</link>
  <description>
  Bad, why? &lt;br&gt; By use of the word &amp;quot;This&amp;quot;, below, I mean combination unrelated operations &lt;br&gt; into a single operation. &lt;br&gt; 1) This is a key technique they use to speed up interpreters. It&#39;s called &lt;br&gt; &amp;quot;super instructions&amp;quot; (Anton Ertl) or &amp;quot;superoperators&amp;quot; (Todd Proebstring). &lt;br&gt; 2) This is also a key technique used in recent x86 processors. It&#39;s called
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/f48eba436239e692?show_docid=f48eba436239e692</guid>
  <author>
  do_not_h...@nohavenot.cmm
  (Rod Pemberton)
  </author>
  <pubDate>Mon, 04 Jan 2010 11:17:32 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/0ebc585c5651325e?show_docid=0ebc585c5651325e</link>
  <description>
  &amp;quot;Tim Roberts&amp;quot; asked: &lt;br&gt; I just looked at the CPU-internal Register-numbers, and as the first three &lt;br&gt; might also be the most used/altered/instruction-inher ent since 8000, this &lt;br&gt; could be the reason for not saving their contents in Lib-functions of HLLs. &lt;br&gt; __ &lt;br&gt; wolfgang
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/0ebc585c5651325e?show_docid=0ebc585c5651325e</guid>
  <author>
  nowh...@never.at
  (wolfgang kern)
  </author>
  <pubDate>Mon, 04 Jan 2010 11:17:21 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/c315b1cb9cb4112c?show_docid=c315b1cb9cb4112c</link>
  <description>
  The fact that the &amp;quot;callee preserves&amp;quot; registers are the same ones that &lt;br&gt; can be used in an effective address (16-bit) may be relevant... or not... &lt;br&gt; Best, &lt;br&gt; Frank
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/c315b1cb9cb4112c?show_docid=c315b1cb9cb4112c</guid>
  <author>
  fbkot...@munged.microcosmotalk.com
  (Frank Kotler)
  </author>
  <pubDate>Mon, 04 Jan 2010 11:17:12 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/fcb409ee6f16aa7a?show_docid=fcb409ee6f16aa7a</link>
  <description>
  Although I agree with your naming, this seems like a non sequitur. Why do &lt;br&gt; you think this supports the choice of volatile registers in the calling &lt;br&gt; convention?
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/fcb409ee6f16aa7a?show_docid=fcb409ee6f16aa7a</guid>
  <author>
  t...@munged.microcosmotalk.com
  (Tim Roberts)
  </author>
  <pubDate>Mon, 04 Jan 2010 02:34:22 UT
</pubDate>
  </item>
  <item>
  <title>Re: Calling convention odd?</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/ac3528c3e15145db?show_docid=ac3528c3e15145db</link>
  <description>
  That&#39;s not accurate. You can say &amp;quot;they do less work per instruction&amp;quot; &lt;br&gt; compared to CISC, but not &amp;quot;per CPU clock&amp;quot;. The typical RISC set runs one &lt;br&gt; instruction per clock, and it&#39;s difficult to do much better than that. &lt;br&gt; Most x86 compilers use the CPUs as if they were RISC anyway, by eschewing &lt;br&gt; the more complicated instructions. Look at the CPU code generated by an
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a9f6429f09f95d5a/ac3528c3e15145db?show_docid=ac3528c3e15145db</guid>
  <author>
  t...@munged.microcosmotalk.com
  (Tim Roberts)
  </author>
  <pubDate>Mon, 04 Jan 2010 02:33:44 UT
</pubDate>
  </item>
  <item>
  <title>comp.lang.asm.x86 FAQ</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/c448e02fc604872a/54583ba57b80ee73?show_docid=54583ba57b80ee73</link>
  <description>
  Before posting technical questions please read the FAQ: &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.frontiernet.net/~fys/faq/index.htm&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; You may also download a copy in zip format from the above site. &lt;br&gt; The original version (which has not been updated since 21 March 2000) &lt;br&gt; can still be accessed from: &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.faqs.org/faqs/by-newsgroup/comp/comp.lang.asm.x86.html&quot;&gt;[link]&lt;/a&gt;
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/c448e02fc604872a/54583ba57b80ee73?show_docid=54583ba57b80ee73</guid>
  <author>
  jcarl...@munged.microcosmotalk.com
  (Jim Carlock)
  </author>
  <pubDate>Sat, 02 Jan 2010 23:01:31 UT
</pubDate>
  </item>
  <item>
  <title>Re: NOTICE: C.L.A.X service interruption!</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a3373b2f5ac6bda0/29f301d05c5d8260?show_docid=29f301d05c5d8260</link>
  <description>
  Jim Carlock &amp;lt;jcarl...@munged.microcosmotal k.com&amp;gt; wrote in part: &lt;br&gt; ssh is the std in the Unix world, you could look at &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://sshwindows.sourceforge.net&quot;&gt;[link]&lt;/a&gt; or &lt;br&gt; &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.freesshd.com&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; for host [server] software. &lt;br&gt; These should give you a fully encrypted channel, with public keys &lt;br&gt; used to exchange a session [private] key _before_ you login with
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a3373b2f5ac6bda0/29f301d05c5d8260?show_docid=29f301d05c5d8260</guid>
  <author>
  red...@ev1.net.invalid
  (Robert Redelmeier)
  </author>
  <pubDate>Sat, 02 Jan 2010 05:48:42 UT
</pubDate>
  </item>
  <item>
  <title>Re: multithreading in Asm</title>
  <link>http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a24f2d180dfc6e9b/77dc2c830dea3818?show_docid=77dc2c830dea3818</link>
  <description>
  this is more true of processes than of threads... &lt;br&gt; the OS handles threads, but is not necessary to use it to have threads... &lt;br&gt; more so, in the case of many HLL&#39;s, it is not even really necessary that &lt;br&gt; there be multiple OS threads to implement multiple HLL threads. this could &lt;br&gt; be the case either with an interpreter (which could jump between interpreter
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.lang.asm.x86/browse_thread/thread/a24f2d180dfc6e9b/77dc2c830dea3818?show_docid=77dc2c830dea3818</guid>
  <author>
  cr88...@munged.microcosmotalk.com
  (BGB / cr88192)
  </author>
  <pubDate>Sat, 02 Jan 2010 01:59:48 UT
</pubDate>
  </item>
  </channel>
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