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Message from discussion x86 Sequential Consistency

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NNTP-Posting-Date: Sun, 19 Nov 2006 18:51:39 -0600
From: "Chris Thomasson" <cris...@comcast.net>
Newsgroups: comp.arch,comp.programming.threads
References: <4s2rp8Ftne37U1@mid.individual.net> <Os2dnWENTcE2i_3YnZ2dnUVZ_sSdnZ2d@comcast.com> <456044a6$0$5710$9b4e6d93@newsspool3.arcor-online.net>
Subject: Re: x86 Sequential Consistency
Date: Sun, 19 Nov 2006 17:05:11 -0800
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"Elcaro Nosille" <Elcaro.Nosi...@mailinator.com> wrote in message 
news:456044a6$0$5710$9b4e6d93@newsspool3.arcor-online.net...
>   Chris Thomasson schrieb:
>
>> http://groups.google.com/group/comp.programming.threads/msg/b0ab2c4405d1c2c6
>> http://groups.google.com/...
>> http://groups.google.com/...
>
> Why do you think fences are necessary. When we're synchronizing threads,
> we're at least using an atomic op which does the fencing for us.

Fences are necessary on x86 when your algorithm can't handle the fact that a 
store followed by a load to another location can, and will, be reordered... 
For instance, Petersons Algorithm needs to use an mfence in order to prevent 
the latter load from the other state variable from migrating above the lock 
acquisition logic:

http://groups.google.com/group/comp.programming.threads/browse_frm/thread/c49c0658e2607317
(if you study the code, you should know exactly why a mfence is needed...)



;^)