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  <title>comp.arch Google Group</title>
  <link>http://groups.google.com/group/comp.arch</link>
  <description>Computer architecture.</description>
  <language>en</language>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/c5d64af87daf1beb?show_docid=c5d64af87daf1beb</link>
  <description>
  You don&#39;t really need the same delay. Just the same delay modulo the clock &lt;br&gt; period. The latter is usually bounded &lt;br&gt; &lt;p&gt;-- &lt;br&gt; mac the naïf
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/c5d64af87daf1beb?show_docid=c5d64af87daf1beb</guid>
  <author>
  acol...@efunct.com
  (mac)
  </author>
  <pubDate>Mon, 20 May 2013 17:55:29 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/2984433386ea5cf0?show_docid=2984433386ea5cf0</link>
  <description>
  Noob wrote: &lt;br&gt; &lt;p&gt;I just came across RWT&#39;s take on the subject: &lt;br&gt; &lt;p&gt;&lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.realworldtech.com/intel-dram/&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; &lt;p&gt;RWT wrote: &lt;br&gt; &lt;p&gt;Regards.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/2984433386ea5cf0?show_docid=2984433386ea5cf0</guid>
  <author>
  r...@127.0.0.1
  (Noob)
  </author>
  <pubDate>Mon, 20 May 2013 11:15:26 UT
</pubDate>
  </item>
  <item>
  <title>Call for Papers: World Congress on Engineering and Computer Science WCECS 2013</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/28991c0e7c9a41d7/40d54b00d685d625?show_docid=40d54b00d685d625</link>
  <description>
  Call for Papers: World Congress on Engineering and Computer Science &lt;br&gt; WCECS 2013 &lt;br&gt; &lt;p&gt;CFP: World Congress on Engineering and Computer Science WCECS 2013 &lt;br&gt; Draft Paper Submission Deadline: 2 July, 2013 &lt;br&gt; Camera-Ready Papers Due &amp;amp; Registration Deadline: 30 July, 2013 &lt;br&gt; WCECS 2013: San Francisco, USA, 23-25 October, 2013
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/28991c0e7c9a41d7/40d54b00d685d625?show_docid=40d54b00d685d625</guid>
  <author>
  iaeng_imecs_wce_wcec...@iaeng.org
  (iaeng_imecs_wce_wcecs_e)
  </author>
  <pubDate>Mon, 20 May 2013 08:20:27 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/e62977929df680d9?show_docid=e62977929df680d9</link>
  <description>
  The boundary between a signal on a wire and RF in a waveguide blurs, &lt;br&gt; even in old tech. On the B6500 circa 1970, the Gardner-Denver backplanes &lt;br&gt; that the cards fit into (roughly five flip-flops per card) were subject &lt;br&gt; to spurious ringing; frequency and hot spot varied from machine to &lt;br&gt; machine due to parts tolerance variation. Jake Vigil, the brilliant
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/e62977929df680d9?show_docid=e62977929df680d9</guid>
  <author>
  i...@ootbcomp.com
  (Ivan Godard)
  </author>
  <pubDate>Sat, 18 May 2013 19:24:59 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/ee258b51926489ed?show_docid=ee258b51926489ed</link>
  <description>
  I used to make a joke about just putting the entire chip inside a magnetron &lt;br&gt; and sticking a wire up everywhere you wanted a clock signal. &lt;br&gt; &lt;p&gt;Mitch
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/ee258b51926489ed?show_docid=ee258b51926489ed</guid>
  <author>
  mitchal...@aol.com
  (MitchAlsup)
  </author>
  <pubDate>Sat, 18 May 2013 18:51:03 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/84616a29b3e87af0?show_docid=84616a29b3e87af0</link>
  <description>
  In article &amp;lt;4dfep8hn5ecppfmbl93ih4nd1308e 4g...@4ax.com&amp;gt;, &lt;br&gt; &lt;p&gt;We already have 2GB of on-package RAM for some cellphone apps, though &lt;br&gt; that&#39;s BGA-on-BGA mounting and no faster than contemporary PC main &lt;br&gt; memory. &lt;br&gt; &lt;p&gt;&lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.hardkernel.com/renewal_2011/products/prdt_info.php?g_code=G135341370451&quot;&gt;[link]&lt;/a&gt; &lt;br&gt; is one you can get off the shelf for a fairly trivial sum.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/84616a29b3e87af0?show_docid=84616a29b3e87af0</guid>
  <author>
  twom...@chiark.greenend.org.uk
  (Thomas Womack)
  </author>
  <pubDate>Sat, 18 May 2013 16:28:21 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/843f26ba9e42997b?show_docid=843f26ba9e42997b</link>
  <description>
  On May 14th, 2013, UnixRun...@GMail.com sent: &lt;br&gt; &lt;p&gt;You might enjoy reading the SoC (System-on-a-Chip) literature.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/843f26ba9e42997b?show_docid=843f26ba9e42997b</guid>
  <author>
  colin_paul_glos...@acm.org
  (Paul Colin de Gloucester)
  </author>
  <pubDate>Sat, 18 May 2013 14:01:57 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/a2fdf8964f42320f?show_docid=a2fdf8964f42320f</link>
  <description>
  Well, if I wanted to transmit a clock signal to every part of a chip &lt;br&gt; with the same delay wherever it is used, I would be able to solve that &lt;br&gt; problem by using a trace that looked like little versions of the &lt;br&gt; letter H on the points of larger versions... &lt;br&gt; &lt;p&gt;A curve like that for the flow of liquid inside a heat sink would also
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/a2fdf8964f42320f?show_docid=a2fdf8964f42320f</guid>
  <author>
  jsav...@ecn.ab.ca
  (Quadibloc)
  </author>
  <pubDate>Sat, 18 May 2013 11:05:19 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/2409f0625e427f3c?show_docid=2409f0625e427f3c</link>
  <description>
  On Fri, 17 May 2013 17:25:17 -0700, &amp;quot;Chris M. Thomasson&amp;quot; &lt;br&gt; &lt;p&gt;I basically agree - some amount of local memory (but still globally &lt;br&gt; visible and cache coherent) that is significantly faster than the &lt;br&gt; global memory would be a significant performance boost. Most OS&#39;s are &lt;br&gt; already NUMA aware, so tweaking them to improve page placement to take
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/2409f0625e427f3c?show_docid=2409f0625e427f3c</guid>
  <author>
  robertwess...@yahoo.com
  (Robert Wessel)
  </author>
  <pubDate>Sat, 18 May 2013 08:56:19 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/85e6632b2ff9c467?show_docid=85e6632b2ff9c467</link>
  <description>
  On Fri, 17 May 2013 13:24:47 -0700, &amp;quot;Chris M. Thomasson&amp;quot; &lt;br&gt; &lt;p&gt;I was thinking along the lines of the 8GB of memory being directly &lt;br&gt; integrated with &lt;br&gt; the 2 processors such that the main 8gb &amp;quot;local&amp;quot; memory and its CPU&#39;s are &lt;br&gt; one... &lt;br&gt; &lt;p&gt;Literally a fraction of a millimeter/nanometer away. 3d stacked perhaps.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/85e6632b2ff9c467?show_docid=85e6632b2ff9c467</guid>
  <author>
  n...@spam.invalid
  (Chris M. Thomasson)
  </author>
  <pubDate>Sat, 18 May 2013 00:25:17 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/bef3a9d2779d40c6?show_docid=bef3a9d2779d40c6</link>
  <description>
  On Fri, 17 May 2013 13:24:47 -0700, &amp;quot;Chris M. Thomasson&amp;quot; &lt;br&gt; &lt;p&gt;That&#39;s basically the &amp;quot;book&amp;quot; design IBM uses on mainframes. Current &lt;br&gt; mainframes can hold up to four books, each of which contains &lt;br&gt; processors (six multi-core chips, plus L4 cache in an MCM), memory &lt;br&gt; (all memory is on-book), and the top of the I/O hierarchy.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/bef3a9d2779d40c6?show_docid=bef3a9d2779d40c6</guid>
  <author>
  robertwess...@yahoo.com
  (Robert Wessel)
  </author>
  <pubDate>Fri, 17 May 2013 22:27:45 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/18b458c5b8f90d5e?show_docid=18b458c5b8f90d5e</link>
  <description>
  I have always wanted the chip makers to create their own memory and &lt;br&gt; try to directly integrate it with several multi-core processors. &lt;br&gt; &lt;p&gt;Can you directly integrate, say 8GB of memory and 2 multi-core processors &lt;br&gt; on a pluggable board? The motherboard would have high-speed bays for &lt;br&gt; these boards and several processors dedicated to system work like
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/18b458c5b8f90d5e?show_docid=18b458c5b8f90d5e</guid>
  <author>
  n...@spam.invalid
  (Chris M. Thomasson)
  </author>
  <pubDate>Fri, 17 May 2013 20:24:47 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/8c2149f153a41ef1?show_docid=8c2149f153a41ef1</link>
  <description>
  It&#39;s package on package. Two separate packages on top of each other. Not really &lt;br&gt; a single package, although I guess you could look at it that way if you purchase &lt;br&gt; the SoC and RAM already soldered together. &lt;br&gt; &lt;p&gt;The memory package itself does have multiple stacked dies to achieve the &lt;br&gt; necessary density and interface width. There have even been combo chips that
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/8c2149f153a41ef1?show_docid=8c2149f153a41ef1</guid>
  <author>
  exoph...@gmail.com
  </author>
  <pubDate>Fri, 17 May 2013 16:14:01 UT
</pubDate>
  </item>
  <item>
  <title>Re: Computer on a chip...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/7e06a6e369fe0e0d?show_docid=7e06a6e369fe0e0d</link>
  <description>
  That is true enough. Even there, though, history records many failed &lt;br&gt; attempts at things like &amp;quot;wafer-scale technology&amp;quot;. &lt;br&gt; &lt;p&gt;It is true caches have limitations and overhead. I would be very &lt;br&gt; pleased to have a big chip which not only has all the memory on the &lt;br&gt; chip, but, say, a 4,096-bit-wide path between the memory and the CPU.
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/0ecb5b96dc07828a/7e06a6e369fe0e0d?show_docid=7e06a6e369fe0e0d</guid>
  <author>
  jsav...@ecn.ab.ca
  (Quadibloc)
  </author>
  <pubDate>Fri, 17 May 2013 11:16:17 UT
</pubDate>
  </item>
  <item>
  <title>Re: Fractal heat transfer...</title>
  <link>http://groups.google.com/group/comp.arch/browse_thread/thread/28b3d73e8ddcaae4/9b1104cf48ee34e2?show_docid=9b1104cf48ee34e2</link>
  <description>
  &lt;a target=&quot;_blank&quot; rel=nofollow href=&quot;http://www.google.com/patents/US8253639&quot;&gt;[link]&lt;/a&gt;
  </description>
  <guid isPermaLink="true">http://groups.google.com/group/comp.arch/browse_thread/thread/28b3d73e8ddcaae4/9b1104cf48ee34e2?show_docid=9b1104cf48ee34e2</guid>
  <author>
  n...@spam.invalid
  (Chris M. Thomasson)
  </author>
  <pubDate>Thu, 16 May 2013 23:36:53 UT
</pubDate>
  </item>
  </channel>
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