Description:
Field Programmable Gate Array based computing systems.
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value of the weak pull up resistor on IOBs of Virtex5
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Hi, Virtex5 datasheet state that there is a optional configurable weak pull-up/pull-down resistor on each IOB. What is the value of that resistor? I looked at the user guide and configuration guide but could not find it.
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How to input an analog signal to FPGA board for processing?
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Hello, I am a beginer and have a basic question. My project implemented on FPGA board (which is Spartan3E-1600 Microblaze Development Kit) includes ADC and is supposed to do some digital signal processing of an analog RF signal from 'outside world'. How I can input an analog signal to my FPGA?
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RLC package parasitics
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In the IBIS model i can find the package parasitics R_pkg, L_pkg and C_pkg ... but what does these values represent? is it the total parasitics of the entire pins of the package? is it for single pins of the package?
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how to set trigger in ChipScopePro for this
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Hi all, I have an application where my data refreshes every 10 seconds...It takes so long as I am doing some sort of an averaging over a few million samples and then taking the statistics once in those few million samples.My system clock is of 40 MHz and it's fed from outside through a SMA connector in Virtex2P board. Hence to get... more »
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Xilinx ML507 evaluation board (V5FXT70)?
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A past google-search revealed Xilinx employees saying this board will be equipped with a Virtex5/FXT70. From what I remember, the FXT70 requires a full-seat of ISE Foundation 10.x (or the equivalent evaluation-edition), and won't compile in Webpack 10.x. Is that correct? Looks like I may have to stick with the much more... more »
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getting samples from an RF board onto the system
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hi, I have got an RF board (antenna+ADC+Some signal processing boxes on a board). The output is a 2bit data and a clock (16MHz). I need to store this 2 bit data for 1 second onto my system in some text or binary format for using it in my simulations. What is the best (in very less time) method to do this?... more »
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USB full speed final project proposal
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I invite you to use free code of a USB full speed project as final work for diploma. The site includes some description of the functionality and main state machines. The code is based on some free cores 8051 and USB function. The PHY is my own code. [link]... more »
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