Description:
Field Programmable Gate Array based computing systems.
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Microblaze interconnection
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Hello, I need to connect two Microblaze processors, each on a seperate Spartan 3e chip, but on the same board. Can this be done through FSL? Would it require two seperate projects in the XPS? Is there an example or tutorial on this subject?
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PCI card unrecognized
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Hello, I have a PMC module that sits on a PCI-PMC adapter (adapter has some bus switches). I find that when the PCI card is plugged into one slot (slot 4) on the Motherboard the card is recognized by the "lspci" command under linux, however if the PCI card is plugged into another slot (slot 6, using... more »
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Initializing color bars on CH7301
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I'm working with a xilinx virtex 5 board (with the VLX110T) and have been trying to get any kind of output to a DVI monitor. I'm using the IIC core in XPS to try and program the CH7301. I'm using a clock generator to send a 25MHz clock to the xclk pin, sending a high value to the xclk*, and not sending any of the 12 data bits because I'm assuming they aren't needed for... more »
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Virtex 5 ISERDES
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I am looking at using the ISERDES block in a V5 design for a DDR2 controller. I want to input the DQ into an IODELAY block and then into the ISERDES. Problem is I am not sure that you can do this anymore. I have seen some old app notes with this configuration and a DDLY input on the ISERDES. But the new user guides dont have this input and they call the ISERDES a... more »
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Spartan6 PCIe and multiboot
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Hi! I am designing a system that needs PCIe and multiboot operation. I would like to be able to reprogram the application FPGA at any moment. The safest option would be using a GN4124 and any FPGA. That would be clean and simple. But if you think of PCIe and multiboot then using a single Spartan6 comes out as the cheap and flexible option. I... more »
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