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Message from discussion External Cloking of Altera MAX 7000S
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Andy Peters  
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 More options Oct 11 1999, 3:00 am
Newsgroups: comp.arch.fpga
From: "Andy Peters" <apeters.nos...@nospam.noao.edu.nospam>
Date: 1999/10/11
Subject: Re: External Cloking of Altera MAX 7000S

Moussa Ba wrote in message <37FE7BBC.BCF86...@eng.umd.edu>...
>The board I am using is the University Program Altera board that features a
>MAX7000S as well as a FLEX10K chip.  I did notice that on the pinout of the
>MAX7000S it had a bunch of VCCIO, VCCINT and GND pins.  In my pin
description
>file it mentions that these pins have to be connected to 5.0,5.0 and GND
>respectively.  I assumed that these pins were directly driven by the
on-board
>power supply.  Is my assumption wrong?  I did test out the pins and they
provide
>no Voltage.  Do I have to provide that voltage?

VCCIO and VCCINT are the chip's power supply voltage inputs.  You need to
connect them to a +5V supply.  The board should have some sort of
power-supply input (otherwise, it's not going to do anything interesting!).

tucson is gorgeous this time of year...

-- a
-----------------------------------------
Andy Peters
Sr Electrical Engineer
National Optical Astronomy Observatories
950 N Cherry Ave
Tucson, AZ 85719
apeters (at) noao \dot\ edu

"Creation Science" is oxymoronic.


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