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Newsgroups: comp.arch.fpga
From: Moussa Ba <b...@eng.umd.edu>
Date: 1999/10/08
Subject: Re: External Cloking of Altera MAX 7000S
The board I am using is the University Program Altera board that features a
MAX7000S as well as a FLEX10K chip. I did notice that on the pinout of the MAX7000S it had a bunch of VCCIO, VCCINT and GND pins. In my pin description file it mentions that these pins have to be connected to 5.0,5.0 and GND respectively. I assumed that these pins were directly driven by the on-board power supply. Is my assumption wrong? I did test out the pins and they provide no Voltage. Do I have to provide that voltage? Moussa Mike wrote:
> Moussa Ba wrote in message <37FD1D45.848CC...@eng.umd.edu>... > >Thank you for your reply. I forgot to mention in my email that I did use a > TTL > >crystal oscillator. And I still get a messed up signal as soon as I > connect the > >clock to the clock input of the MAX chip. > Is it possible that you connect your clock to a wrong pin? Check how your > Mikhail Matusov You must Sign in before you can post messages.
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