Actel Proto Boards
Josh Model
It seems as if Actel's stuff starts at ~$1k, and I was looking for one
closer to the $500 range.
Thanks,
--Josh
Jerry D. Harthcock
QuickCores offers a low cost IP Delivery System based on Actel's new
ProASIC+.
Prices start at $175 for the APA075. It's all self-contained in that
no external device programmer is required. It also includes a
built-in JTAG boundary scan controller and built-in JTAG real-time
debug controller for microcontroller designs. No JTAG pod is required
since everything is done via RS-232 using Actel Libero-generated STAPL
files.
It's all packaged in a 28-pin postage stamp form factor for easy
prototyping. It's called the Musketeer (All-for-One Stamp).
Visit www.quickcores.com for info.
Regards,
Jerry
Jim Granville
Interesting lineup.
What if a designer wants to mix some FPGA HW design, with one of
your soft-cores ? - how is that done ?
Missing from the web, is any speed info on these cores ?
- jg
--
======= 80x51 Tools & IP Specialists =========
= http://www.DesignTools.co.nz
Jerry D. Harthcock
QuickCores offers the cores in synthesizable Verilog netlist format
under separate license. Hook up is straightforward. You simply
instantiate at the top level the CPU, memory, I/O, and whatever other
modules you need for your application. We're working on an object
oriented builder which will allow you to do this automatically.
On the Musketeer, the ProASIC+ is fed with a 24.5 MHz clock (see data
sheet at QC web)from the Musketeer's built-in "helper" micro. For the
Q68HC05 soft core, this equates to 12.25 MIPs (single cycle
instructions). If implemented in anti-fuse such as QuickLogic
QuickDSP or Actel for example, it's about 2x that.
Jerry
Gregory C. Read
"Jerry D. Harthcock" <je...@quickcores.com> wrote in message
news:c4cfbb5c.02090...@posting.google.com...
>
> QuickCores offers the cores in synthesizable Verilog netlist format
> under separate license. Hook up is straightforward. You simply
> instantiate at the top level the CPU, memory, I/O, and whatever other
> modules you need for your application. We're working on an object
> oriented builder which will allow you to do this automatically.
>
> On the Musketeer, the ProASIC+ is fed with a 24.5 MHz clock (see data
> sheet at QC web)from the Musketeer's built-in "helper" micro. For the
> Q68HC05 soft core, this equates to 12.25 MIPs (single cycle
> instructions). If implemented in anti-fuse such as QuickLogic
> QuickDSP or Actel for example, it's about 2x that.
>
> Jerry
Any plans for a 6809 core?
--
Greg
rea...@xxxhotmail.com
(Remove the 'xxx' to send Email)
Eric Braeden
"Gregory C. Read" <rea...@xxxhotmail.com> wrote in message news:clid9.5530>I like the old 6809 too, but a real one is a lot cheaper. :(
Gregory C. Read
"Eric Braeden" <bra...@erinet.com> wrote in message
news:3d7616b1$0$1433$272e...@news.execpc.com...
I agree. But they are out of production, AFAIK. If I'm wrong, I would sure
like to know who's making them.
Jerry D. Harthcock
Not at this time.
John Eaton
: "Josh Model" <mo...@ll.mit.edu> wrote in message news:<wkc89.44$I7....@llslave.llan.ll.mit.edu>...
: Visit www.quickcores.com for info.
: Regards,
: Jerry
Looks interesting. Actel has a parallel port/jtag interface for downloading
but it looks like you built that on the module with power supplys and a
debugger. So how do you guys make your money?
1) selling modules as a development tool.
2) selling modules for products.
3) licensing cores.
4) any way you can.
Can we take a design developed on your module and download the bits to an
actel part mounted on our board?
Any chance of doing a serial/jtag programming debug module that would program
and control an actel part on our board?
Is the serial protocol open or propritary?
John Eaton
Reply address is a spam trap. use first_last @ hp.com instead.
Jerry D. Harthcock
The Musketeer was originally intended that it be designed right into
the end application board because of its 28-pin "stamp" form factor.
You can socket it for about 25 cents. The nice thing about having
everything built in is that it can be re-programmed remotely, and the
implemented micro debugged/monitored in real time using the built-in
RS-232 port. With the built-in JTAG boundary scan controller, you can
also do boundary scan testing of the part even after its installed in
the field, and do it remotely. All you need is an RS-232 connection
to a PC.
"Yes", to (1)-(4) above. We also sell debuggers and do custom
implementations as well.
There is a Musketeer product brief at our web site,
www.quickcores.com. Listed are all the FBGA ball numbers used by the
built-in "helper" micro and these are reserved. Otherwise, you should
be able to implement whatever design you want.
With respect to "downloading bits", the Musketeer's ProASIC+ is
programmed by "playing" a STAPL file over its RS-232 port. The STAPL
file is the very STAPL file created by Libero. So if your hook-ups
are the same and the target APAxxx device is the same, then you should
be able to use the same STAPL file. If not, you can simply go into
Libero's Pin Edit and shuffle your pins around to conform to your
application board, and then simply re-route followed by STAPL
generation.
We could build a stamp form factor programmer/debugger/boundary scan
controller that you could design into your board. We've discussed
this but no one has demanded it yet. It would essentially be a
Musketeer minus the ProASIC+ device.
The serial protocols are proprietary but are available under terms of
the license that comes with the programmer/debugger software.
Regards,
Jerry