Spartan 6 migration whitepaper points out some significant changes

[Gabor]

A new white paper from Xilinx talks about migrating designs to the
new Spartan 6 series.

http://fpgajournal.net/fpgajournal/ondemand/20091119-01-xilinx/

There are some architecture changes in this family that could affect
designs that use extended set/reset functionality of the current
Spartan 3 and older generations:

Asynchronous set and reset of the same flip-flop
Asynchronous set with initialization to 0
Asynchronous reset with initialization to 1

Apparently adding more flip-flops to a slice has reduced the
routing resources for set/reset functionality to each flip-flop.

Regards,
Gabor