low cost MPEG4 codec (from Atmel )
T Lee
(I am using Xilinx at this time - a few very expensive one.)
Since it is from a fpga company, I wonder if it use one of those
FPGA 2 ASIC conversion process to get such low cost price pointer
for such complex chip.
I wonder if has anyone done similar complex SOC chip with
xilinx/altera?
....
The AT76C120 device supports high performance still-image and video
decoding of media files encoded according to JPEG, MPEG4, MPEG1,
Motion JPEG
standards
....
The AT76C120 is compatible with its predecessors, and is an integrated
ARM7TDMI processor that controls the entire application and manages
file-system, decoding and display functions. All necessary
peripherals, including TV video output, USB, UART and SPI, and digital
audio interfaces, have been integrated on the chip
....
http://www.prnewswire.com/cgi-bin/stories.pl?ACCT=109&STORY=/www/story/10-04-2004/0002264661&EDATE=
http://www.atmel.com/dyn/resources/prod_documents/5676s.pdf
-Tony
Derek Simmons
device for DSP and Image Processing. One of the companies that came
was BARCO. They license cores for JPEG/MPEG compression.
Derek
Philip Freidin
>I don't work for Atmel. I am interested in knowing how they did it.
>(I am using Xilinx at this time - a few very expensive one.)
>
>Since it is from a fpga company, I wonder if it use one of those
>FPGA 2 ASIC conversion process to get such low cost price pointer
>for such complex chip.
Atmel does have FPGA products, but that is hardly their main
product line. They have extensive memory products, processors,
and application specific chips.
http://www.atmel.com/products/product_selector.asp
They have also been a significant custom/ASIC vendor and
foundry.
What you are looking at almost certainly did not go through a
simple FPGA-2-ASIC process, given the on-chip CPU is an ARM.
It may have been prototyped in FPGAs (as many ASICs are these
days), but not with their FPGAs (too small). Either Xilinx or
Altera would be more likely candidates.
On the other hand, the chip is mostly many existing IP blocks,
so if their development flow is reliable enough, and their
simulation/verification supports stitching many IP blocks
together, it may not have been prototyped at all.
The low price point is because they expect to sell it in high
volume, and it does not have any of the silicon overheads of
an FPGA. Just like any other custom SOC.
>I wonder if has anyone done similar complex SOC chip with
>xilinx/altera?
Sure. In big, expensive FPGAs, with the ARM as an additional
chip.
>-Tony
Philip
Philip Freidin
Fliptronics
Ulf Samuelsson
news:470b6397.04101...@posting.google.com...
> I don't work for Atmel. I am interested in knowing how they did it.
> (I am using Xilinx at this time - a few very expensive one.)
>
>
> Since it is from a fpga company, I wonder if it use one of those
> FPGA 2 ASIC conversion process to get such low cost price pointer
> for such complex chip.
No, you might use FPGAs for prototyping, but in the end you synthesize in an
ASIC flow.
The ASIC conversion improve pricing, but not down to standard cell pricing.
Typically you use a gate array, and those are not as effective as standard
cell.
You hardly fit the AT76C120 on a single FPGA, and you are not going to
get any good pricing for the end product.
>
>
> I wonder if has anyone done similar complex SOC chip with
> xilinx/altera?
>
> ....
--
Best Regards
Ulf at atmel dot com
These comments are intended to be my own opinion and they
may, or may not be shared by my employer, Atmel Sweden.
Derek Simmons
> Nice chip, but it's MPEG-4 at 30 fps (good), CIF resolution (320x240 - yuck). They list one of its applications is a PVR.... Who's going to build a PVR out of that?
Maybe for a wrist watch.
Derek