gcc tool chain/dissasembly question

[me]

Hi guys,

I'm new to arm and am having problems to recognize the ouput of
objdump. I'm compiling for cortex-m0, and the following is an excerpt
of my vector table:

0: 10002000 andne r2, r0, r0
4: 00000305 andeq r0, r0, r5, lsl #6
8: 000002fd strdeq r0, [r0], -sp
c: 000002fd strdeq r0, [r0], -sp

I can upload and debug, so I know the code is fine. This output
doesn't match, however, any of the tutorials I could find on the
internet. What could I be doing wrong?

I assume the first entry is 32 bits wide (as opossed to 16 it should
be, being a thumb only core), as it needs to point to the top of the
stack. But if I force thumb output on objdump, I get a bunch of `lsl'
instructions which make even less sense to me for a vector table.

Also, `--target-help' will show me `armv6-m' architecture as
supported, but then objdump won't show it:

arm-none-eabi-objdump: supported targets: elf32-littlearm elf32-bigarm
elf32-little elf32-big srec symbolsrec verilog tekhex binary ihex

arm-none-eabi-objdump: supported architectures: arm armv2 armv2a armv3
armv3m armv4 armv4t armv5 armv5t armv5te xscale ep9312 iwmmxt iwmmxt2

Can somebody give me hint on any of these?

Regards,

[Arlet Ottens]

On 06/12/2011 06:12 PM, me wrote:
> Hi guys,
>
> I'm new to arm and am having problems to recognize the ouput of
> objdump. I'm compiling for cortex-m0, and the following is an excerpt
> of my vector table:
>
> 0: 10002000 andne r2, r0, r0
> 4: 00000305 andeq r0, r0, r5, lsl #6
> 8: 000002fd strdeq r0, [r0], -sp
> c: 000002fd strdeq r0, [r0], -sp
>
> I can upload and debug, so I know the code is fine. This output
> doesn't match, however, any of the tutorials I could find on the
> internet. What could I be doing wrong?
>
> I assume the first entry is 32 bits wide (as opossed to 16 it should
> be, being a thumb only core), as it needs to point to the top of the
> stack. But if I force thumb output on objdump, I get a bunch of `lsl'
> instructions which make even less sense to me for a vector table.

On the Cortex M0, the vector table does not contain code (like on an ARM
core), but addresses of the exception handlers.

http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/BABIFJFG.html

So, 0x10002000 is your initial stack pointer, and 0x304 is the entry
point of your reset handler (it says 0x035 to indicate Thumb code).

[Roberto Waltman]

me wrote:
>I'm new to arm and am having problems to recognize the ouput of
>objdump. I'm compiling for cortex-m0, and the following is an excerpt
>of my vector table:
>
> 0: 10002000 andne r2, r0, r0
> 4: 00000305 andeq r0, r0, r5, lsl #6
> 8: 000002fd strdeq r0, [r0], -sp
> c: 000002fd strdeq r0, [r0], -sp
>
>I can upload and debug, so I know the code is fine. This output
>doesn't match, however, any of the tutorials I could find on the
>internet. What could I be doing wrong?

Don't know how to change the way that data is displayed but, in any
case, a vector table is a list of addresses, not a code segment.
Trying to interpret the addresses as instructions is meaningless.

For example in this C snippet, the contents of the vector_table array
are not instructions:

void f1(void);
void f2(void);
void f3(void);
int i;
typedef void (*vector)(void);

vector vector_table[] = {f1, f2, f3};
...
if ((i > 0) && (i < (sizeof(vector_table)/sizeof(vector))))
{
vector_table[i]();
}
--
Roberto Waltman

[ Please reply to the group,
return address is invalid ]

[me]

Thanks guys!

how dumb!, I just didn't think of it, After all I'm not using other
than pointers within the vector table. Got a bit messed up with this,
the thumb set, and probably also expecting it to be similar to avr,
which I have previously used.

Thanks for the quick response, I've been pulling my hair off with this
one a bit lately! hehe