Thanks.
DMA throughput may suffer a lot in the when transferring data in the
CPU-to-device ("writing") direction, but DMA throughput in the
device-to-CPU ("reading") direction shouldn't be affected very much.
If they upgrade the chipset from TI-XIO2000A to TI-XIO2001, the
thoughput in the CPU-to-device direction should be better because "The
XIO2001 incorporates a new logic module which greatly improves the
performance of upstream memory read transactions. This auto pre-fetch
agent will generate speculative read requests on behalf of a PCI master
or masters."
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=scpa046&fileType=pdf
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-=( Ian Abbott @ MEV Ltd. E-mail: <abb...@mev.co.uk> )=-
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