[PATCH] To get NAND BB working on Latest u-boot

Syed Mohammed, Khasim

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Dec 10, 2008, 9:53:24 AM12/10/08

to beagl...@googlegroups.com, Dirk Behme, Steve Sakoman, menon.n...@gmail.com, Jason Kridner

Patch to get NAND Bad Block Management working for both SW and HW ecc

Signed-off-by: Syed Mohammed Khasim <kha...@beagleboard.org>

---

--- u-boot-arm/drivers/mtd/nand/omap_gpmc.c 2008-12-08
11:06:46.000000000 +0530
+++ u-boot-bb/drivers/mtd/nand/omap_gpmc.c 2008-12-10
19:38:13.000000000 +0530
@@ -249,12 +249,6 @@ void omap_nand_switch_ecc(int32_t hardwa
mtd = &nand_info[nand_curr_device];
nand = mtd->priv;

- /* clean up allocated buffers */
- nand_release(mtd);
- /* Switch back to the original value, mark me unscanned */
- nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |
- NAND_NO_AUTOINCR;
-
/* Reset ecc interface */
nand->ecc.read_page = NULL;
nand->ecc.write_page = NULL;

Nishanth Menon

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Dec 10, 2008, 6:42:50 PM12/10/08

to Syed Mohammed, Khasim, beagl...@googlegroups.com, Dirk Behme, Steve Sakoman, Jason Kridner, Pandita, Vikram, Menon, Nishanth

On Wed, Dec 10, 2008 at 8:53 AM, Syed Mohammed, Khasim
<sm.k...@gmail.com> wrote:
> Patch to get NAND Bad Block Management working for both SW and HW ecc
>
> Signed-off-by: Syed Mohammed Khasim <kha...@beagleboard.org>
>
> ---
>
> --- u-boot-arm/drivers/mtd/nand/omap_gpmc.c 2008-12-08
> 11:06:46.000000000 +0530
> +++ u-boot-bb/drivers/mtd/nand/omap_gpmc.c 2008-12-10
> 19:38:13.000000000 +0530
> @@ -249,12 +249,6 @@ void omap_nand_switch_ecc(int32_t hardwa
> mtd = &nand_info[nand_curr_device];
> nand = mtd->priv;
>
> - /* clean up allocated buffers */
> - nand_release(mtd);
> - /* Switch back to the original value, mark me unscanned */
> - nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |
> - NAND_NO_AUTOINCR;
> -

hand applied and checked against zoom:
OMAP3 Zoom1# nand bad

Device 0 bad blocks:
00160000
02980000
029a0000
02da0000
04b40000
058e0000
05c40000
08120000
08300000
085c0000
08a00000
090c0000
0bc00000
0cd60000
0d380000
0d3a0000
0df80000
OMAP3 Zoom1# nandecc hw
HW ECC selected
OMAP3 Zoom1# nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000
Erasing at 0x0 -- 25% complete.
NAND 256MiB 1,8V 16-bit: MTD Erase failure: -5

NAND 256MiB 1,8V 16-bit: MTD Erase failure: -5

OK
OMAP3 Zoom1# nandecc sw
SW ECC selected
OMAP3 Zoom1# nand unlock
device 0 whole chip
OMAP3 Zoom1# nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000

NAND 256MiB 1,8V 16-bit: MTD Erase failure: -5

OK
OMAP3 Zoom1# nandecc hw
HW ECC selected
OMAP3 Zoom1# nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000

NAND 256MiB 1,8V 16-bit: MTD Erase failure: -5

OK
OMAP3 Zoom1#

It just did not work for me.. I suppose I do need unlock here.. will
test against beagle at home..

Regards,
Nishanth Menon

Syed Mohammed, Khasim

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Dec 11, 2008, 7:13:03 AM12/11/08

to Nishanth Menon, Dirk Behme, Steve Sakoman, Jason Kridner, Menon, Nishanth, Pandita, Vikram, beagl...@googlegroups.com

>>-----Original Message-----
>>From: Nishanth Menon [mailto:menon.n...@gmail.com]
>>Sent: Wednesday, December 10, 2008 10:03 PM
>>To: Syed Mohammed, Khasim
>>Cc: Dirk Behme; Steve Sakoman; Jason Kridner; Pandita, Vikram; Menon, Nishanth
>>Subject: Re: [PATCH] To get NAND BB working on Latest u-boot
>>
>>Nishanth Menon said the following on 12/10/2008 05:42 PM:
>><snip>

>>> It just did not work for me.. I suppose I do need unlock here.. will
>>> test against beagle at home..
>>>

For Beagle, you don't need an unlock

The below patch should be good, as it avoids the memory leak and works
for both hw and sw ecc

Signed-off-by: Syed Mohammed Khasim <kha...@ti.com>
---

--- u-boot-arm/drivers/mtd/nand/omap_gpmc.c 2008-12-08
11:06:46.000000000 +0530

+++ u-boot-bb/drivers/mtd/nand/omap_gpmc.c 2008-12-11
16:50:35.000000000 +0530
@@ -249,11 +249,7 @@ void omap_nand_switch_ecc(int32_t hardwa

mtd = &nand_info[nand_curr_device];
nand = mtd->priv;

- /* clean up allocated buffers */
- nand_release(mtd);
- /* Switch back to the original value, mark me unscanned */
- nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |
- NAND_NO_AUTOINCR;

+ nand->options = NAND_OWN_BUFFERS | NAND_BBT_SCANNED;

Dirk Behme

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Dec 11, 2008, 1:53:32 PM12/11/08

to Syed Mohammed, Khasim, Nishanth Menon, Steve Sakoman, Jason Kridner, Menon, Nishanth, Pandita, Vikram, beagl...@googlegroups.com

Khasim,

First thanks for finding the root cause of the issues!

Do you like to test slightly reworked patch in attachment?

Ideas in this patch:

- board_nand_init() sets initial nand->options. Seems we used
NAND_NO_AUTOINCR twice :(

- In omap_nand_switch_ecc() don't set the same options (with same
wrong NAND_NO_AUTOINCR done twice) again. I.e. remove them.

- Don't touch initial options, set NAND_OWN_BUFFERS | NAND_BBT_SCANNED
*additionally* ("|=")

=> To be tested with some printf debugging: Is NAND_BBT_SCANNED
already set here, so we don't have to touch it here?

- Before omap_nand_switch_ecc() exit, un-set NAND_OWN_BUFFERS again to
be on the safe side. In case somebody later intentionally calls
nand_release(), we want to free the buffer.

=> To be tested with some printf debugging: Does nand_scan_tail()
modifiy NAND_BBT_SCANNED? I.e. how is NAND_BBT_SCANNED set if we
set/don't set it manually above, before calling nand_scan_tail().

Best regards

Dirk

0001_nandbb.txt

Dirk Behme

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Dec 12, 2008, 11:27:06 AM12/12/08

to Steve Sakoman, beagl...@googlegroups.com, Syed Mohammed, Khasim, Nishanth Menon, Jason Kridner, Menon, Nishanth, Pandita, Vikram

Updated, final, tested patch in attachment.

Steve: If you like, please apply.

Best regards

Dirk

Btw: For the archives log of final testing:

http://www.beagleboard.org/irclogs/index.php?date=2008-12-12#T15:29:21

0001_nandbb.txt

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