January Symposium - GPU/parallel processing

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Phil Last

unread,
Jan 2, 2013, 3:58:41 PM1/2/13
to BAA London
BAA London - the London based discussion group for the APL family of
array languages.

The January Symposium will be held on Friday 25 at:

The Albion
2/3 New Bridge Street
City of London
London
EC4V 6AA

https://maps.google.co.uk/maps?q=the+albion+ec4v+6aa

Upstairs room booked from 14.30 'til 17.30

Meet earlier downstairs for a drink and/or a chat.
----------
Agenda:

Following Gert Møller's talk about parallel processing with GPUs back
in September we have two implementers to demonstrate and discuss their
approaches using Q and APL.

Philip Beasley-Harling works in banking writing mostly in Q, the
higher-level language built on K.

Michael Hughes is an APL consultant who implemented Gert's system in
Dyalog APL.

------------
Free WiFi and a large screen we can attach to.

Suggestions and discussion of agenda please to:
http://groups.google.com/group/baa-london/topics

Please feel free to cross-post this announcement to other forums where
others might be interested.
------------------------------

Walter Fil

unread,
Jan 3, 2013, 10:03:45 AM1/3/13
to baa-l...@googlegroups.com
I'll definitely be there.

Regards, Walter

Ray Cannon

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Jan 5, 2013, 4:19:07 AM1/5/13
to baa-l...@googlegroups.com
I hope to attend.

The following advert (apology) might be of (great?) interest to this
subject:

Intel debuts new Xeon Phi coprocessors

Bizarre as it may first seem, but the last time that Intel released a
co-processor was way back in 1987 when the 80387 launched. This
coprocessor plugged into the motherboard next to your 80386, adding the
ability to make complex Floating Point calculations that weren�t part of
the original 8086 instruction set. Since then however all Intel (and
compatible clones) have had FPU (floating point units) built in,
negating the need for a coprocessor.

That�s all set to change in 2013 however as Intel has announced a whole
new series of exciting coprocessors � the Xeon Phi series. Like previous
co-processors the Xeon Phi has been specifically designed to speed up
certain types of calculations, in this case the highly parallel
compute-intensive workloads found in many server rooms and supercomputer
clusters.

The Xeon Phi is based on the Intel MIC (Many Integrated Cores)
architecture, the name giving a strong hint that each Xeon Phi is based
around an array of multiple processors all working together in parallel.
The first model, the Xeon Phi 5110P includes 60 such cores and 8GB of
its own on-board memory. Packaged as a 16x PCI-E 2.0 card so that you
can install multiple Xeon Phis in your server, Intel claims it can
calculate as much as up 1 Teraflop of double precision peak performance,
at least ten times more than a standard 8086 CPU can manage.

Unlike competing coprocessors the Xeon Phi can be addressed using common
programming languages and tools, which will make it far easier and
quicker to start using.

On 02/01/2013 20:58, Phil Last wrote:
> BAA London - the London based discussion group for the APL family of
> array languages.
>
> The January Symposium will be held on Friday 25 at:
>
> The Albion
> 2/3 New Bridge Street
> City of London
> London
> EC4V 6AA
>
> https://maps.google.co.uk/maps?q=the+albion+ec4v+6aa
>
> Upstairs room booked from 14.30 'til 17.30
>
> Meet earlier downstairs for a drink and/or a chat.
> ----------
> Agenda:
>
> Following Gert M�ller's talk about parallel processing with GPUs back

Phil Last

unread,
Jan 21, 2013, 6:03:03 AM1/21/13
to BAA London
This coming Friday. Bring along your experience and requirements to
discuss in parallel.

On Jan 5, 9:19 am, Ray Cannon <ray_can...@compuserve.com> wrote:
> I hope to attend.
>
> The following advert (apology)  might be of (great?) interest to this
> subject:
>
> Intel debuts new Xeon Phi coprocessors
>
>                 Bizarre as it may first seem, but the last time that Intel released a
> co-processor was way back in 1987 when the 80387 launched. This
> coprocessor plugged into the motherboard next to your 80386, adding the
> ability to make complex Floating Point calculations that weren t part of
> the original 8086 instruction set. Since then however all Intel (and
> compatible clones) have had FPU (floating point units) built in,
> negating the need for a coprocessor.
>
> That s all set to change in 2013 however as Intel has announced a whole
> new series of exciting coprocessors the Xeon Phi series. Like previous
> > Following Gert M ller's talk about parallel processing with GPUs back

John Jacob

unread,
Jan 21, 2013, 7:49:46 AM1/21/13
to baa-l...@googlegroups.com, Phil Last
With regret I have to offer my apologies but I will not be able to
attend this or the next meeting due to holiday commitments.

Jake (John Jacob)

Stephen Taylor

unread,
Jan 21, 2013, 12:08:19 PM1/21/13
to baa-l...@googlegroups.com
On a training course in the City, dues to end at 3pm – will come along afterwards.

Stephen

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Phil Last

unread,
Jan 25, 2013, 6:48:28 PM1/25/13
to BAA London
Phil B-H was unfortunately unable to come at the last minute and has
promised to fulfill his offer at a later date. Nevertheless a
successful meeting was had with Mike H. delivering a sparkling
presentation and demo linking to his home machine and The Albion
delivering a toothsome Haggis with Neeps and Tatties.

On Jan 21, 5:08 pm, Stephen Taylor <s...@5jt.com> wrote:
> On a training course in the City, dues to end at 3pm – will come along
> afterwards.
>
> Stephen
>
> On 21 January 2013 12:49, John Jacob <john.ja...@johnbutlerassociates.ltd.uk
>
>
>
>
>
>
>
> > wrote:
> > With regret I have to offer my apologies but I will not be able to attend
> > this or the next meeting due to holiday commitments.
>
> > Jake (John Jacob)
>
> > On 21/01/2013 11:03, Phil Last wrote:
>
> >> This coming Friday. Bring along your experience and requirements to
> >> discuss in parallel.
>
> >> On Jan 5, 9:19 am, Ray Cannon<ray_can...@compuserve.**com<ray_can...@compuserve.com>>
> >>>>https://maps.google.co.uk/**maps?q=the+albion+ec4v+6aa<https://maps.google.co.uk/maps?q=the+albion+ec4v+6aa>
> >>>> Upstairs room booked from 14.30 'til 17.30
> >>>> Meet earlier downstairs for a drink and/or a chat.
> >>>> ----------
> >>>> Agenda:
> >>>> Following Gert M ller's talk about parallel processing with GPUs back
> >>>> in September we have two implementers to demonstrate and discuss their
> >>>> approaches using Q and APL.
> >>>> Philip Beasley-Harling works in banking writing mostly in Q, the
> >>>> higher-level language built on K.
> >>>> Michael Hughes is an APL consultant who implemented Gert's system in
> >>>> Dyalog APL.
> >>>> ------------
> >>>> Free WiFi and a large screen we can attach to.
> >>>> Suggestions and discussion of agenda please to:
> >>>>http://groups.google.com/**group/baa-london/topics<http://groups.google.com/group/baa-london/topics>
> >>>> Please feel free to cross-post this announcement to other forums where
> >>>> others might be interested.
> >>>> ------------------------------
>
> > --
> > You received this message because you are subscribed to the Google Groups
> > "BAA London" group.
> > To post to this group, send email to baa-l...@googlegroups.com.
> > To unsubscribe from this group, send email to baa-london+unsubscribe@**
> > googlegroups.com <baa-london%2Bunsu...@googlegroups.com>.
> > For more options, visit this group athttp://groups.google.com/**
> > group/baa-london?hl=en <http://groups.google.com/group/baa-london?hl=en>.
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