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Does anyone have the alignment procedures for the G007 and G008 cards in the Straight 8?

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dpi

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Nov 6, 2009, 4:47:01 PM11/6/09
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The problem we are facing now is getting the memory checker board to
run more than a few minutes. It looks like there has been enough
drift in components over the years that it needs to have the pots
tweaked. We have gotten the memory checkerboard to run in field zero
for up to 15 minutes by swaping cards on the bits that fail to the
second bank. When I started working on this the time to failure was
just a couple of minutes. The problem is that after things start to
warm up there is enough drift that the memory checkerboard program
self corrupts by picking up bits. I would like to know the factory
procedure where they aligned the cards. This isn't in the maintenance
manual as far as I can tell and a web search turned up nothing. We
have studied the schematics and understand what everything does but
this doesn't tell you the proper way to adjust things. There could be
an order dependency so that you aren't chasing your tail making
adjustments.

Last night we worked on adjusting the slice level. Found the voltage
range end points where it fails completely and tried setting it to the
center of this range. This gives us a about 13-15 minutes of run
time. I would be happier if this was several hours or even overnight.

You might be asking how we diagnose this.

In 2004 we changed the serial interface in two ways. It sends RS-232
levels instead of current loop and we can set the baud rate to between
110 and 38400 baud. The machine will reliably send at 38400 but it
wont receive at that speed. Works reliably both directions at 9600
baud so we normally run it at that speed.

We connect the serial port to an old pc I have running FreeBSD. We
have written several programs so that the pc looks like a fast KSR
teletype. Since 9600 baud is 960cps and this is more 3 times faster
than the high speed paper tape it makes sense to feed tape images from
the pc. We have written a few utilities for the 8 that are very
useful. The ones we use for this are:

clear_to_7700
This program resides at 7700 and clears memory from 0 to 7700 in
field zero.

dump_memory
This program dumps field zero to the teletype as 4096 eight bit/four
bit pairs.

On the pc you send something to the 8 with a program called to8. This
sends 8 bit frames just like the low speed reader was activated only a
lot faster. There is a program frompdp that accepts the dump_memory
output and builds a human readable file of address/data pairs.

So the process to make a memory checkerboard test looks like:

Key in the low speed RIM loader (or verify it is still there) via the
front panel switches.

enter 7756 on the switches and press load addr.
press start to run the low speed RIM loader.

On the pc run to8 clear_to_7700
This will download the clear_to_7700 RIM format papertape image to the
8.

press stop.
enter 7700 on the switches and press load addr.
press start to run the clear_to_7700 program.

Memory on the 8 is now zero between addresses 0 and 7700.

enter 7756 on the switches and press load addr.
press start to run the low speed RIM loader.

On the pc run to8 ../papertapes/maindec-802
This will download the memory checkerboard program to the 8.

press stop.
enter 7756 on the switches and press load addr.
Press start to run the low speed RIM loader.

On the pc run to8 dump_memory
This will download the memory dump program.

Press stop.
On the pc run frompdp 802-pre
enter 7700 on the switches and press load addr.
Press start to run the dump_memory program.

This will dump all of memory to a file in the current directory called
802-pre.mem. This is a core dump of memory before running the memory
checkboard program.

enter 0001 on the switches and press load addr.
enter 0100 on the switches and press start.

The memory checker board program will run until it halts on an error
or crashes. For us this is now taking about 15 minutes. It reports
an error but this is caused by the program accidently modifying
itself. How we discover this is by the following.

On the pc run frompdp 802-post
enter 7700 on the switches and press load addr.
press start.

After 8.5 seconds there will be a file 802-post.mem on the pc that can
be compared to 802-pre.mem with some program. We use sdiff because it
shows the differences side by side ( sdiff 802-pre.mem 802-post.mem |
less ). The version of the memory checkboard we are using lives down
low below 0115 so any differences below this are due to return
addresses being filled in, variables changing or program corruption.
There is one instruction that seems to get changed often and that is
at 0061 and is a 7001 instruction (IAC). This gets changed to a 7021
in the last few runs and then since this is not the same as an IAC (in
this case it is a CML IAC) the program halts shortly when it
incorrectly identifies a problem. It is very easy to see changes with
this approach and the higher speed serial interface is most helpful.
(It would be better still if 38400 worked and I may look at that
soon).

The memory checkboard is designed as a worst case pattern for this
particular core memory arrangement and I have not seen it change any
bits in anything else plus the fact that it takes many minutes to
fail. For most stuff it is working good enough to run fairly
reliably. I am looking forward to enough confidence to allow it to
run for several days if desired. And then we get to fix the second
bank of memory. That one has some address problems currently.
Probably X-Y driver problems.

So are there any FE's or Factory Techs or just some clever person out
there that remembers or has figured out how these cards were adjusted?

Thanks!

Doug Ingraham
Rapid City, SD

dpi

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Nov 8, 2009, 11:03:51 AM11/8/09
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As a followup Vincent Slyngstad sent me a pdf copy of a document "PDP8
Memory Tuning" which is the original factory installation setup
procedure.

Thank you Vince!

Doug Ingraham

dpi

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Nov 9, 2009, 1:49:07 AM11/9/09
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I've just shut down the 8 after running the memory checkerboard for 2
and a half hours.

The problem turned out to be the thermistor for the R/W voltage
regulator (this is inside the core stack) was no longer connected to
the power supply regulator so it was no longer adjusting the voltage
as the temperature changed. How this got disconnected is a mystery to
me. I believe this was broken this way when I got the machine. At
some time it was disconnected and the voltage was adjusted to sort of
correct for the missing thermistor. After reconnecting the thermistor
I had to turn down the R/W voltage by about 11 volts. This is about
4-5 turns of the pot on the regulator board. I wish I had the
maintenance logs for this machine to explain why this was done. Still
a lot to do to tune the memory. I don't have a current probe but I
don't see why I can't measure the Inhibit and R/W current directly
across the 80ohm resistors (correcting for temperature variation in
the resistance of course). Or I can buy (or build) a current probe.

The next step will be to finish tuning the core and then to bring the
second 4k memory bank back to life. After that I think I will try to
run marginal tests and correct anything else I find wrong.

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