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Bus controller model for VHDL & Python cosimulation

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wzab

unread,

Jun 20, 2007, 3:50:27 PM6/20/07

I just had to simulate a complex system with hardware described in VHDL,
working with software part written in Python.
In the real world the Python program uses a dedicated library to
communicate with the hardware via an asynchronous bus.
In the simulation I needed an entity which could imitate the bus
controller, generating the read and write cycles, when the appropriate
function is called in the Python code.
The solution should be simple and portable. Therefore I've decided to
use named pipes to establish communication between the VHDL and Python
parts.

The obtained results seem to be interesting enough to share with you.
Maybe they will be useful for others as well.

I attach four files:
bus_ctrl.vhd - the bus controller described in VHDL
bus_ctrl_tb.vhd - the testbench (bus controller connected to the very
small RAM)
tester.py - the python program implementing the read, write and delay
routines and performing some simulated accesses
test.sh - the bash script demonstrating the above files (gtkwave is
needed to view the waveforms)

--
Best regards,
Wojtek Zabolotny
wz...@ise.pw.edu.pl

#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.6.3).
# To extract the files from this archive, save it to some FILE, remove
# everything before the `#!/bin/sh' line above, then type `sh FILE'.
#
lock_dir=_sh00431
# Made on 2007-06-20 21:45 CEST by <wzab@wzab>.
# Source directory was `/tmp/simul'.
#
# Existing files will *not* be overwritten, unless `-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------
# 3309 -rw-r--r-- bus_ctrl_tb.vhd
# 7147 -rw-r--r-- bus_ctrl.vhd
# 588 -rw-r--r-- tester.py
# 512 -rwxrw-r-- test.sh
#
MD5SUM=${MD5SUM-md5sum}
f=`${MD5SUM} --version | egrep '^md5sum .*(core|text)utils'`
test -n "${f}" && md5check=true || md5check=false
${md5check} || \
echo 'Note: not verifying md5sums. Consider installing GNU coreutils.'
save_IFS="${IFS}"
IFS="${IFS}:"
gettext_dir=FAILED
locale_dir=FAILED
first_param="$1"
for dir in $PATH
do
if test "$gettext_dir" = FAILED && test -f $dir/gettext \
&& ($dir/gettext --version >/dev/null 2>&1)
then
case `$dir/gettext --version 2>&1 | sed 1q` in
*GNU*) gettext_dir=$dir ;;
esac
fi
if test "$locale_dir" = FAILED && test -f $dir/shar \
&& ($dir/shar --print-text-domain-dir >/dev/null 2>&1)
then
locale_dir=`$dir/shar --print-text-domain-dir`
fi
done
IFS="$save_IFS"
if test "$locale_dir" = FAILED || test "$gettext_dir" = FAILED
then
echo=echo
else
TEXTDOMAINDIR=$locale_dir
export TEXTDOMAINDIR
TEXTDOMAIN=sharutils
export TEXTDOMAIN
echo="$gettext_dir/gettext -s"
fi
if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null
then if (echo -n test; echo 1,2,3) | grep n >/dev/null
then shar_n= shar_c='
'
else shar_n=-n shar_c= ; fi
else shar_n= shar_c='\c' ; fi
f=shar-touch.$$
st1=200112312359.59
st2=123123592001.59
st2tr=123123592001.5 # old SysV 14-char limit
st3=1231235901

if touch -am -t ${st1} ${f} >/dev/null 2>&1 && \
test ! -f ${st1} && test -f ${f}; then
shar_touch='touch -am -t $1$2$3$4$5$6.$7 "$8"'

elif touch -am ${st2} ${f} >/dev/null 2>&1 && \
test ! -f ${st2} && test ! -f ${st2tr} && test -f ${f}; then
shar_touch='touch -am $3$4$5$6$1$2.$7 "$8"'

elif touch -am ${st3} ${f} >/dev/null 2>&1 && \
test ! -f ${st3} && test -f ${f}; then
shar_touch='touch -am $3$4$5$6$2 "$8"'

else
shar_touch=:
echo
${echo} 'WARNING: not restoring timestamps. Consider getting and'
${echo} 'installing GNU `touch'\'', distributed in GNU coreutils...'
echo
fi
rm -f ${st1} ${st2} ${st2tr} ${st3} ${f}
#
if test ! -d ${lock_dir}
then : ; else ${echo} 'lock directory '${lock_dir}' exists'
exit 1
fi
if mkdir ${lock_dir}
then ${echo} 'x - created lock directory `'${lock_dir}\''.'
else ${echo} 'x - failed to create lock directory `'${lock_dir}\''.'
exit 1
fi
# ============= bus_ctrl_tb.vhd ==============
if test -f 'bus_ctrl_tb.vhd' && test "$first_param" != -c; then
${echo} 'x -SKIPPING bus_ctrl_tb.vhd (file already exists)'
else
${echo} 'x - extracting bus_ctrl_tb.vhd (text)'
sed 's/^X//' << 'SHAR_EOF' > 'bus_ctrl_tb.vhd' &&
-------------------------------------------------------------------------------
-- Title : Testbench for design "bus_ctrl"
-- Project :
-------------------------------------------------------------------------------
-- File : bus_ctrl_tb.vhd
-- Author : wzab
-- Company :
-- Created : 2006-12-02
-- Last update: 2006-12-03
-- Platform :
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description:
-------------------------------------------------------------------------------
-- Copyright (c) 2006
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2006-12-02 1.0 wzab Created
-------------------------------------------------------------------------------
X
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;
library work;
-------------------------------------------------------------------------------
X
entity bus_ctrl_tb is
X
end bus_ctrl_tb;
X
-------------------------------------------------------------------------------
X
architecture symul2 of bus_ctrl_tb is
X
X component bus_ctrl
X generic (
X addrwidth : integer;
X datawidth : integer;
X rdpipename : string;
X wrpipename : string);
X port (
X bus_address : out std_logic_vector((addrwidth-1) downto 0);
X bus_data : inout std_logic_vector((datawidth-1) downto 0);
X bus_read_nwrite : out std_logic;
X bus_cs : out std_logic);
X end component;
X
X type RAM_T is array (15 downto 0) of std_logic_vector(31 downto 0);
X signal ram : RAM_T;
X signal ram_addr : integer range 0 to 15;
X
X -- component generics
X constant addrwidth : integer := 32;
X constant datawidth : integer := 32;
X constant rdpipename : string := "rdpipe";
X constant wrpipename : string := "wrpipe";
X
X -- component ports
X signal bus_address : std_logic_vector((addrwidth-1) downto 0);
X signal bus_data : std_logic_vector((datawidth-1) downto 0);
X signal bus_read_nwrite : std_logic := '1';
X signal bus_cs : std_logic := '0';
X
X -- clock
X signal Clk : std_logic := '1';
X
begin -- symul2
X
X -- component instantiation
X DUT : bus_ctrl
X generic map (
X addrwidth => addrwidth,
X datawidth => datawidth,
X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (
X bus_address => bus_address,
X bus_data => bus_data,
X bus_read_nwrite => bus_read_nwrite,
X bus_cs => bus_cs);
X
X -- simulation of RAM
X ram_addr <= to_integer(unsigned(bus_address(3 downto 0)));
X process (bus_cs, bus_data, bus_read_nwrite, ram, ram_addr)
X begin -- process
X if bus_cs = '1' then
X if bus_read_nwrite = '0' then
X ram(ram_addr) <= bus_data;
X else
X bus_data <= ram(ram_addr);
X end if;
X else
X bus_data <= (others => 'Z');
X end if;
X end process;
X
X Clk <= not Clk after 10 ns;
end symul2;
X
-------------------------------------------------------------------------------
X
configuration bus_ctrl_tb_symul2_cfg of bus_ctrl_tb is
X for symul2
X end for;
end bus_ctrl_tb_symul2_cfg;
X
-------------------------------------------------------------------------------
SHAR_EOF
(set 20 06 12 03 22 55 23 'bus_ctrl_tb.vhd'; eval "$shar_touch") &&
chmod 0644 'bus_ctrl_tb.vhd'
if test $? -ne 0
then ${echo} 'restore of bus_ctrl_tb.vhd failed'
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'bus_ctrl_tb.vhd: MD5
check failed'
) << SHAR_EOF
fe152099d8d40ee309480a0cecdff177 bus_ctrl_tb.vhd
SHAR_EOF
else
test `LC_ALL=C wc -c < 'bus_ctrl_tb.vhd'` -ne 3309 && \
${echo} 'restoration warning: size of bus_ctrl_tb.vhd is not 3309'
fi
fi
# ============= bus_ctrl.vhd ==============
if test -f 'bus_ctrl.vhd' && test "$first_param" != -c; then
${echo} 'x -SKIPPING bus_ctrl.vhd (file already exists)'
else
${echo} 'x - extracting bus_ctrl.vhd (text)'
sed 's/^X//' << 'SHAR_EOF' > 'bus_ctrl.vhd' &&
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;
library work;
X
entity bus_ctrl is
X
X generic (
X addrwidth : integer := 32;
X datawidth : integer := 32;
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (
X bus_address : out std_logic_vector((addrwidth-1) downto 0);
X bus_data : inout std_logic_vector((datawidth-1) downto 0);
X bus_read_nwrite : out std_logic;
X bus_cs : out std_logic);
X
end bus_ctrl;
X
architecture simul of bus_ctrl is
X
begin -- simul
X
X
X
X process
X
X file write_pipe : text;
X file read_pipe : text;
X variable code : character;
X variable db_line : line;
X variable rd_line : line;
X variable wr_line : line;
X
X procedure read_hex_stlv (
X variable fline : inout line;
X constant nbits : integer;
X variable res : out std_logic_vector) is
X
X variable tmp : std_logic_vector((nbits+3) downto 0) :=
(others => '0');
X variable c : character;
X variable npos, nchars : integer;
X begin -- readhex
X nchars := (nbits+3)/4; -- number of hex chars to read
X for i in nchars-1 downto 0 loop
X npos := i*4+3;
X read (fline, c);
X case c is
X when '0' =>
X tmp(npos downto npos-3) := "0000";
X when '1' =>
X tmp(npos downto npos-3) := "0001";
X when '2' =>
X tmp(npos downto npos-3) := "0010";
X when '3' =>
X tmp(npos downto npos-3) := "0011";
X when '4' =>
X tmp(npos downto npos-3) := "0100";
X when '5' =>
X tmp(npos downto npos-3) := "0101";
X when '6' =>
X tmp(npos downto npos-3) := "0110";
X when '7' =>
X tmp(npos downto npos-3) := "0111";
X when '8' =>
X tmp(npos downto npos-3) := "1000";
X when '9' =>
X tmp(npos downto npos-3) := "1001";
X when 'a' =>
X tmp(npos downto npos-3) := "1010";
X when 'A' =>
X tmp(npos downto npos-3) := "1010";
X when 'b' =>
X tmp(npos downto npos-3) := "1011";
X when 'B' =>
X tmp(npos downto npos-3) := "1011";
X when 'c' =>
X tmp(npos downto npos-3) := "1100";
X when 'C' =>
X tmp(npos downto npos-3) := "1100";
X when 'd' =>
X tmp(npos downto npos-3) := "1101";
X when 'D' =>
X tmp(npos downto npos-3) := "1101";
X when 'e' =>
X tmp(npos downto npos-3) := "1110";
X when 'E' =>
X tmp(npos downto npos-3) := "1110";
X when 'f' =>
X tmp(npos downto npos-3) := "1111";
X when 'F' =>
X tmp(npos downto npos-3) := "1111";
X when others =>
X assert(false)
X report "Error: wrong separator in the write command"
severity error;
X end case;
X end loop; -- i
X res := tmp((nbits-1) downto 0);
X end read_hex_stlv;
X
X procedure write_stlv_hex2 (
X res : inout line;
X constant vec : std_logic_vector) is
X variable nibble : integer;
X constant hexdigs : string := "0123456789abcdef";
X begin -- stlv2hex
X nibble := 0;
X if vec'left <= vec'right then
X for i in vec'left to vec'right loop
X if vec(i) = '1' then
X nibble := nibble + 2**(i-vec'left);
X end if;
X end loop; -- i
X else
X for i in vec'right to vec'left loop
X if vec(i) = '1' then
X nibble := nibble + 2**(i-vec'right);
X end if;
X end loop; -- i
X end if;
X write(res, nibble);
X end write_stlv_hex2;
X
X procedure write_stlv_hex (
X res : inout line;
X constant vec : std_logic_vector) is
X variable nibble : integer;
X variable pos : integer;
X constant hexdigs : string := "0123456789abcdef";
X begin -- stlv2hex
X nibble := 1;
X if vec'right <= vec'left then
X for i in vec'left downto vec'right loop
X -- calculate the nibbles
X pos := i mod 4;
X if vec(i) = '1' then
X nibble := nibble + 2**(pos);
X end if;
X if pos=0 then
X write(res, hexdigs(nibble));
X nibble := 1;
X end if;
X end loop; -- i
X else
X for i in vec'right downto vec'left loop
X pos := i mod 4;
X if vec(i) = '1' then
X nibble := nibble + 2**(pos);
X end if;
X if pos=0 then
X write(res, hexdigs(nibble));
X nibble := 1;
X end if;
X end loop; -- i
X end if;
X end write_stlv_hex;
X
X procedure bus_read (
X variable address : in std_logic_vector((addrwidth-1) downto 0);
X variable data : out std_logic_vector((datawidth-1) downto 0)) is
X begin -- vme_read
X bus_address <= address;
X bus_read_nwrite <= '1';
X wait for 50 ns;
X bus_cs <= '1';
X wait for 50 ns;
X data := bus_data;
X bus_cs <= '0';
X wait for 10 ns;
X end bus_read;
X
X procedure bus_write (
X variable address : in std_logic_vector((addrwidth-1) downto 0);
X variable data : in std_logic_vector((datawidth-1) downto 0)) is
X begin
X bus_address <= address;
X bus_read_nwrite <= '0';
X wait for 10 ns;
X bus_data <= data;
X wait for 50 ns;
X bus_cs <= '1';
X wait for 50 ns;
X bus_cs <= '0';
X wait for 10 ns;
X bus_data <= (others => 'Z');
X wait for 10 ns;
X end bus_write;
X
X variable delay : integer;
X variable data : std_logic_vector(31 downto 0);
X variable address : std_logic_vector(31 downto 0);
X
X begin -- process
X file_open(write_pipe, wrpipename, read_mode);
X file_open(read_pipe, rdpipename, write_mode);
X bus_cs <= '0';
X bus_read_nwrite <= '1';
X while not endfile(write_pipe) loop
X -- We read the command from the wrpipe
X readline (write_pipe, rd_line);
X -- Analyze the line (Waddress,data)
X read (rd_line, code);
X case code is
X when 'W' =>
X read_hex_stlv(rd_line, addrwidth, address);
X read (rd_line, code);
X if code /= ',' then
X assert(false)
X report "Error: wrong separator in the write command"
severity error;
X end if;
X read_hex_stlv(rd_line, datawidth, data);
X bus_write(address, data);
X when 'R' =>
X read_hex_stlv(rd_line, addrwidth, address);
X bus_read(address, data);
X write_stlv_hex(wr_line, data);
X writeline(read_pipe, wr_line);
X when 'T' =>
X read_hex_stlv(rd_line,32,data);
X delay := to_integer(unsigned(data));
X for i in 1 to delay loop
X wait for 1 ns;
X end loop; -- i
X when others =>
X assert(false)
X report "Error: wrong character at the begining of the line"
severity error;
X end case;
X end loop;
X wait;
X end process;
X
X
end simul;
SHAR_EOF
(set 20 06 12 03 00 21 54 'bus_ctrl.vhd'; eval "$shar_touch") &&
chmod 0644 'bus_ctrl.vhd'
if test $? -ne 0
then ${echo} 'restore of bus_ctrl.vhd failed'
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'bus_ctrl.vhd: MD5 check
failed'
) << SHAR_EOF
6c891ba477196e61e8bc481ded642929 bus_ctrl.vhd
SHAR_EOF
else
test `LC_ALL=C wc -c < 'bus_ctrl.vhd'` -ne 7147 && \
${echo} 'restoration warning: size of bus_ctrl.vhd is not 7147'
fi
fi
# ============= tester.py ==============
if test -f 'tester.py' && test "$first_param" != -c; then
${echo} 'x -SKIPPING tester.py (file already exists)'
else
${echo} 'x - extracting tester.py (text)'
sed 's/^X//' << 'SHAR_EOF' > 'tester.py' &&
def bus_write(adr,dana):
X cmd="W"+("%8.8x" % adr)+","+("%8.8x" % dana)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X
def bus_read(adr):
X cmd="R"+("%8.8x" % adr)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X s=rdpip.readline()
X return eval("0x"+s)
X
def bus_delay(time_ns):
X cmd="T"+("%8.8x" % time_ns)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X
wrpip=open("wrpipe","w")
rdpip=open("rdpipe","r")
# Just two simple accesses to the bus, to show how it is working
bus_write(0x3,0x1234)
bus_write(0x6,0xcbd67874)
print hex(bus_read(0x6))
bus_delay(200)
print hex(bus_read(0x3))
X
SHAR_EOF
(set 20 06 12 03 00 24 03 'tester.py'; eval "$shar_touch") &&
chmod 0644 'tester.py'
if test $? -ne 0
then ${echo} 'restore of tester.py failed'
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'tester.py: MD5 check failed'
) << SHAR_EOF
b33c37d79e1797a4edc8fa488d11f881 tester.py
SHAR_EOF
else
test `LC_ALL=C wc -c < 'tester.py'` -ne 588 && \
${echo} 'restoration warning: size of tester.py is not 588'
fi
fi
# ============= test.sh ==============
if test -f 'test.sh' && test "$first_param" != -c; then
${echo} 'x -SKIPPING test.sh (file already exists)'
else
${echo} 'x - extracting test.sh (text)'
sed 's/^X//' << 'SHAR_EOF' > 'test.sh' &&
#!/bin/bash
set -e
rm -f rdpipe wrpipe
# Create the named pipes
mknod rdpipe p
mknod wrpipe p
# Compile the VHDL
export VHDLS="bus_ctrl.vhd bus_ctrl_tb.vhd"
STD=standard
#STD=synopsys
ghdl -a --std=02 --ieee=$STD $VHDLS
ghdl -e --std=02 --ieee=$STD bus_ctrl_tb
# Run the python script in the other xterm
xterm -e "python tester.py; echo 'press ENTER'; read" &
# Run the simulation
X./bus_ctrl_tb --wave=bus_ctrl_tb.ghw --stop-time=1000ns
# Let'us view the recorded waveforms
gtkwave bus_ctrl_tb.ghw wzrmb.sav
SHAR_EOF
(set 20 06 12 03 00 31 30 'test.sh'; eval "$shar_touch") &&
chmod 0764 'test.sh'
if test $? -ne 0
then ${echo} 'restore of test.sh failed'
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'test.sh: MD5 check failed'
) << SHAR_EOF
10dc8afa88ddb8f511a9f217513312b5 test.sh
SHAR_EOF
else
test `LC_ALL=C wc -c < 'test.sh'` -ne 512 && \
${echo} 'restoration warning: size of test.sh is not 512'
fi
fi
if rm -fr ${lock_dir}
then ${echo} 'x - removed lock directory `'${lock_dir}\''.'
else ${echo} 'x - failed to remove lock directory `'${lock_dir}\''.'
exit 1
fi
exit 0

Wojciech Zabolotny

unread,

Jun 20, 2007, 4:32:07 PM6/20/07

Sorry, in my previous post the shar archive got corrupted.
Therefore I send it once again.

Wojciech M. Zabołotny

unread,

Feb 4, 2015, 5:45:47 PM2/4/15

Archive-name: ipbus-cbus
Version: 1.0
Submitted-by: wz...@ise.pw.edu.pl (Wojciech M. Zabolotny)

These sources implement very simple modules allowing to control
(in simulation) blocks connected to the IPbus bus
( https://svnweb.cern.ch/trac/cactus ) from the Python script.

The cbus_read_nodes function reads the address table, and returns
a dictionary of nodes.
You can access those nodes by name and read or write them:
nodes=cbus.cbus_read_nodes()
nodes["MY_NODE"].write(3)
x=nodes["MY_2ND_NODE"].read()

Of course you can also store reference to the node:
my2node=nodes["MY_2ND_NODE"]
my2node.write(12)
y=my2node.read()

In your VHDL model you should instantiate the ipbus_ctrl block
which drives the IPbus (signals ipb_in and ipb_out).

Communication between the python and VHDL parts is established via
named pipes (it works with GHDL and in simulator in Vivado,
I've not checked other simulators).

Please note, that current implementation is only a proof of the concept.
I implement only simple reads and writes.
Also the handshake implemented in bus_write ans bus_read are far from
optimal (they are working, but I'm not sure if they are absolutely
correct).

The code is published as PUBLIC DOMAIN

This code is based on my old post:
https://groups.google.com/forum/#!original/alt.sources/tPpYjeke__s/KL9Hl8E9JYgJ
also mentioned in http://dx.doi.org/10.1117/12.981877

#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.14).

# To extract the files from this archive, save it to some FILE, remove
# everything before the '#!/bin/sh' line above, then type 'sh FILE'.
#

lock_dir=_sh17860
# Made on 2015-02-04 23:22 CET by <wzab@WZlap>.
# Source directory was '/tmp/ipbus'.

#
# Existing files will *not* be overwritten, unless '-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------

# 2405 -rwxr--r-- cbus.py
# 8084 -rw-r--r-- ipbus_ctrl.vhd

#
MD5SUM=${MD5SUM-md5sum}
f=`${MD5SUM} --version | egrep '^md5sum .*(core|text)utils'`
test -n "${f}" && md5check=true || md5check=false
${md5check} || \
echo 'Note: not verifying md5sums. Consider installing GNU coreutils.'

if test "X$1" = "X-c"
then keep_file=''
else keep_file=true
fi
echo=echo

save_IFS="${IFS}"
IFS="${IFS}:"
gettext_dir=

locale_dir=
set_echo=false

for dir in $PATH
do

if test -f $dir/gettext \

&& ($dir/gettext --version >/dev/null 2>&1)
then
case `$dir/gettext --version 2>&1 | sed 1q` in
*GNU*) gettext_dir=$dir

set_echo=true
break ;;
esac
fi
done

if ${set_echo}
then
set_echo=false

for dir in $PATH
do

if test -f $dir/shar \

&& ($dir/shar --print-text-domain-dir >/dev/null 2>&1)
then
locale_dir=`$dir/shar --print-text-domain-dir`

set_echo=true
break
fi
done

if ${set_echo}
then

TEXTDOMAINDIR=$locale_dir
export TEXTDOMAINDIR
TEXTDOMAIN=sharutils
export TEXTDOMAIN
echo="$gettext_dir/gettext -s"
fi

fi
IFS="$save_IFS"

if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null
then if (echo -n test; echo 1,2,3) | grep n >/dev/null
then shar_n= shar_c='
'
else shar_n=-n shar_c= ; fi
else shar_n= shar_c='\c' ; fi
f=shar-touch.$$
st1=200112312359.59
st2=123123592001.59
st2tr=123123592001.5 # old SysV 14-char limit
st3=1231235901

if touch -am -t ${st1} ${f} >/dev/null 2>&1 && \
test ! -f ${st1} && test -f ${f}; then
shar_touch='touch -am -t $1$2$3$4$5$6.$7 "$8"'

elif touch -am ${st2} ${f} >/dev/null 2>&1 && \
test ! -f ${st2} && test ! -f ${st2tr} && test -f ${f}; then
shar_touch='touch -am $3$4$5$6$1$2.$7 "$8"'

elif touch -am ${st3} ${f} >/dev/null 2>&1 && \
test ! -f ${st3} && test -f ${f}; then
shar_touch='touch -am $3$4$5$6$2 "$8"'

else
shar_touch=:
echo
${echo} 'WARNING: not restoring timestamps. Consider getting and

installing GNU '\''touch'\'', distributed in GNU coreutils...'
echo
fi
rm -f ${st1} ${st2} ${st2tr} ${st3} ${f}
#
if test ! -d ${lock_dir} ; then :
else ${echo} "lock directory ${lock_dir} exists"
exit 1
fi
if mkdir ${lock_dir}
then ${echo} "x - created lock directory ${lock_dir}."
else ${echo} "x - failed to create lock directory ${lock_dir}."
exit 1
fi

# ============= cbus.py ==============
if test -n "${keep_file}" && test -f 'cbus.py'
then
${echo} "x - SKIPPING cbus.py (file already exists)"

else
${echo} "x - extracting cbus.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'cbus.py' &&
#!/usr/bin/python
# -*- coding: utf-8 -*-
X

def bus_write(adr,dana):
X cmd="W"+("%8.8x" % adr)+","+("%8.8x" % dana)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X
def bus_read(adr):
X cmd="R"+("%8.8x" % adr)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X s=rdpip.readline()
X return eval("0x"+s)
X
def bus_delay(time_ns):
X cmd="T"+("%8.8x" % time_ns)+"\n"
X wrpip.write(cmd)
X wrpip.flush()

print "Python controller ready. Start the simulation!\n"
wrpip=open("/tmp/wrpipe","w")
rdpip=open("/tmp/rdpipe","r")
X
import xml.etree.ElementTree as et
class cbus_obj(object):
X def __init__(self,adr,perm,mask):
X self.adr=adr
X self.can_read=False
X if perm.find("r")>=0:
X self.can_read=True
X self.can_write=False
X if perm.find("w")>=0:
X self.can_write=True
X #Now analyze mask
X if mask==0:
X self.mask = mask
X else:
X self.mask = mask
X #Find shift
X shift=0;
X while mask & 1 == 0:
X mask >>= 1
X shift+=1
X self.shift = shift
X def write(self,value):
X if not self.can_write:
X raise Exception("I can't write to this object")
X if self.mask==0:
X return bus_write(self.adr,value)
X else:
X prev=bus_read(self.adr)
X new_val=value << self.shift
X if (new_val & self.mask) != new_val:
X raise Exception("Attempt to write outside the mask!")
X prev |= self.mask
X prev ^= self.mask
X prev |= new_val
X return bus_write(self.adr, prev)
X
X def read(self):
X if not self.can_read:
X raise Exception("I can't read this object")
X if self.mask==0:
X return bus_read(self.adr)
X else:
X val = bus_read(self.adr)
X val &= self.mask
X val >>= self.shift
X return val
X
def cbus_read_nodes(address_table_file):
X nodes={}
X plik1=et.ElementTree(file=address_table_file)
X #Take the root element
X er=plik1.getroot()
X #It should be "node"
X if er.tag != "node":
X raise Exception("Wrong type of the root element!")
X #Scan child nodes
X for el in er.findall("node"):
X name = el.attrib['id']
X adr = int(el.attrib['address'],16)
X perm = el.attrib['permission']
X if el.attrib.has_key('mask'):
X mask = int(el.attrib['mask'],16)
X else:
X mask = 0
X nodes[name]=cbus_obj(adr,perm,mask)
X return nodes
X
SHAR_EOF
(set 20 15 02 04 23 20 24 'cbus.py'
eval "${shar_touch}") && \
chmod 0744 'cbus.py'

if test $? -ne 0

then ${echo} "restore of cbus.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'cbus.py': 'MD5 check failed'
) << \SHAR_EOF
c88013db7ac7d6cb13615b07b62b0dfd cbus.py
SHAR_EOF

else
test `LC_ALL=C wc -c < 'cbus.py'` -ne 2405 && \
${echo} "restoration warning: size of 'cbus.py' is not 2405"
fi
fi
# ============= ipbus_ctrl.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_ctrl.vhd'
then
${echo} "x - SKIPPING ipbus_ctrl.vhd (file already exists)"

else
${echo} "x - extracting ipbus_ctrl.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_ctrl.vhd' &&
-- Code used to implement the emulated bus
-- according to method publicly disclosed by W.M.Zabolotny in 2007
-- Usenet alt.sources "Bus controller model for VHDL & Python cosimulation"

X
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;

use work.ipbus.all;
library work;
X
entity ipbus_ctrl is
X
X generic (

X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X ipb_out : out ipb_wbus;
X ipb_in : in ipb_rbus;
X ipb_clk : in std_logic
X );
X
end ipbus_ctrl;
X
architecture simul of ipbus_ctrl is
X
X constant addrwidth, datawidth : integer := 32;
X

X begin -- ipbus_read
X --report "Started bus_read" severity note;
X wait until ipb_clk = '0';
X ipb_out.ipb_addr <= address;
X ipb_out.ipb_write <= '0';
X ipb_out.ipb_strobe <= '1';
X wait until ipb_clk = '1';
X --report "clk=1 in bus_read" severity note;
X loop
X exit when ipb_in.ipb_ack = '1';
X wait on ipb_in.ipb_ack;
X end loop;
X --report "ack=1 in bus_read" severity note;
X data := ipb_in.ipb_rdata;
X wait until ipb_clk = '0';
X --report "clk=0 in bus_read" severity note;
X ipb_out.ipb_strobe <= '0';
X loop
X exit when ipb_in.ipb_ack = '0';
X wait on ipb_in.ipb_ack;
X end loop;
X --report "ack=0 in bus_read" severity note;

X wait for 10 ns;

X --report "Completed bus_read" severity note;

X end bus_read;
X
X procedure bus_write (
X variable address : in std_logic_vector((addrwidth-1) downto 0);
X variable data : in std_logic_vector((datawidth-1) downto 0)) is
X begin

X --report "Started bus_write" severity note;
X wait until ipb_clk = '0';
X ipb_out.ipb_addr <= address;
X ipb_out.ipb_wdata <= data;
X ipb_out.ipb_write <= '1';
X ipb_out.ipb_strobe <= '1';
X wait until ipb_clk = '1';
X loop
X exit when ipb_in.ipb_ack = '1';
X wait on ipb_in.ipb_ack;
X end loop;
X wait until ipb_clk = '0';
X ipb_out.ipb_strobe <= '0';
X loop
X exit when ipb_in.ipb_ack = '0';
X wait on ipb_in.ipb_ack;
X end loop;
X ipb_out.ipb_write <= '0';

X wait for 10 ns;

X --report "Completed bus_write" severity note;

X ipb_out <= IPB_WBUS_NULL;

(set 20 15 02 04 23 21 33 'ipbus_ctrl.vhd'
eval "${shar_touch}") && \
chmod 0644 'ipbus_ctrl.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_ctrl.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_ctrl.vhd': 'MD5 check failed'
) << \SHAR_EOF
fd455e40843b622826c4dd337f0c9475 ipbus_ctrl.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_ctrl.vhd'` -ne 8084 && \
${echo} "restoration warning: size of 'ipbus_ctrl.vhd' is not 8084"

Wojciech Zabołotny

unread,

Feb 5, 2015, 11:19:53 AM2/5/15

Archive-name: ipbus-cbus
Version: 1.1

Submitted-by: wz...@ise.pw.edu.pl (Wojciech M. Zabolotny)

This is the implementation of the simple emulated IPbus controller, allowing
you to test IPbus controlled IP core from Python application.
After downloading and unpacking the archive, you need to download the IPbus
files, as described in the ipbus/README.

When everything is in place, you can run the ipbus_test.sh script.
It will open new xterm window with Python application ipbus_test.py
Afterwards please return to the console, and run "make".
It will compile sources and start simulation in GHDL.

The Python application should display an exception, because sources demonstrate
also the IPbus error handling.

If you want to modify address table, you should edit the addr_table file,
and download additional files, as described in the README file in main directory.

All my files in this archive are published as PUBLIC DOMAIN.
The file: ipbus_adr_decode.vhd is generated automatically
The file: slaves.vhd is based on original slaves.vhd from IPbus sources,
but it is very heavily modified.
Probably you should use them according to the original IPbus license.

Good luck!
Wojtek

#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.14).
# To extract the files from this archive, save it to some FILE, remove
# everything before the '#!/bin/sh' line above, then type 'sh FILE'.
#

lock_dir=_sh03435
# Made on 2015-02-05 17:06 CET by <wz...@ise.pw.edu.pl>.
# Source directory was '/tmp/publish'.

#
# Existing files will *not* be overwritten, unless '-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------

# 126 -rw-r--r-- addr_table
# 2608 -rwxr--r-- cbus.py
# 539 -rw-r--r-- ipbus/README
# 993 -rw-r--r-- ipbus_addr_decode.vhd
# 8393 -rw-r--r-- ipbus_ctrl.vhd
# 454 -rwxr--r-- ipbus_test.py
# 217 -rwxr--r-- ipbus_test.sh
# 6294 -rw-r--r-- ipbus_test_top_tb.sav
# 2297 -rw-r--r-- ipbus_test_top_tb.vhd
# 1618 -rw-r--r-- ipbus_test_top.vhd
# 555 -rw-r--r-- ipbus_test.xml
# 1148 -rw-r--r-- makefile
# 578 -rw-r--r-- README
# 2225 -rw-r--r-- slaves.vhd

# ============= addr_table ==============
if test -n "${keep_file}" && test -f 'addr_table'
then
${echo} "x - SKIPPING addr_table (file already exists)"

else
${echo} "x - extracting addr_table (text)"
sed 's/^X//' << 'SHAR_EOF' > 'addr_table' &&
# Example addr_table file to show the format
#
# num name base addr_width
0 buggy 0x00 1
1 regs 0x10 4
X
X
SHAR_EOF
(set 20 15 02 05 14 49 36 'addr_table'

eval "${shar_touch}") && \

chmod 0644 'addr_table'

if test $? -ne 0

then ${echo} "restore of addr_table failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'addr_table': 'MD5 check failed'
) << \SHAR_EOF
0fae91a26f21834a708c1c9e6cc6bcfe addr_table
SHAR_EOF

else
test `LC_ALL=C wc -c < 'addr_table'` -ne 126 && \
${echo} "restoration warning: size of 'addr_table' is not 126"
fi

fi
# ============= cbus.py ==============
if test -n "${keep_file}" && test -f 'cbus.py'
then
${echo} "x - SKIPPING cbus.py (file already exists)"

else
${echo} "x - extracting cbus.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'cbus.py' &&
#!/usr/bin/python
# -*- coding: utf-8 -*-
X
def bus_write(adr,dana):
X cmd="W"+("%8.8x" % adr)+","+("%8.8x" % dana)+"\n"
X wrpip.write(cmd)
X wrpip.flush()

X s=rdpip.readline()
X if s.strip()=="ACK":
X return
X else:
X raise Exception("Wrong status returned:"+s.strip())

def bus_read(adr):
X cmd="R"+("%8.8x" % adr)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X s=rdpip.readline()

X if s.strip()=="ERR":
X raise Exception("Error status returned")

(set 20 15 02 05 11 56 55 'cbus.py'

eval "${shar_touch}") && \
chmod 0744 'cbus.py'
if test $? -ne 0
then ${echo} "restore of cbus.py failed"
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'cbus.py': 'MD5 check failed'
) << \SHAR_EOF

86a4c0a5025dda75f4c30dfa5ed09d98 cbus.py
SHAR_EOF

else
test `LC_ALL=C wc -c < 'cbus.py'` -ne 2608 && \
${echo} "restoration warning: size of 'cbus.py' is not 2608"
fi
fi
# ============= ipbus/README ==============
if test ! -d 'ipbus'; then
mkdir 'ipbus'
if test $? -eq 0
then ${echo} "x - created directory ipbus."
else ${echo} "x - failed to create directory ipbus."
exit 1
fi
fi
if test -n "${keep_file}" && test -f 'ipbus/README'
then
${echo} "x - SKIPPING ipbus/README (file already exists)"

else
${echo} "x - extracting ipbus/README (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus/README' &&
In this directory you should place files:
ipbus_ctrlreg_v.vhd ipbus_fabric.vhd ipbus_package.vhd ipbus_reg_types.vhd
from original IPbus firmware.
X
You can get them as described in the
https://svnweb.cern.ch/trac/cactus/wiki/IPbusFirmware
X
by downloading all firmware sources:
$ svn co http://svn.cern.ch/guest/cactus/tags/ipbus_fw/ipbus_2_0_v1
X
ipbus_fabric.vhd and ipbus_package.vhd you'll find in:
ipbus_2_0_v1/firmware/ipbus_core/hdl
X
ipbus_ctrlreg_v.vhd and ipbus_reg_types.vhd you'll find in:
ipbus_2_0_v1/firmware/slaves/hdl
S
SHAR_EOF
(set 20 15 02 05 16 50 52 'ipbus/README'

eval "${shar_touch}") && \

chmod 0644 'ipbus/README'

if test $? -ne 0

then ${echo} "restore of ipbus/README failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus/README': 'MD5 check failed'
) << \SHAR_EOF
b443e68fc5a6f632d9b2467dd365c108 ipbus/README
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus/README'` -ne 539 && \
${echo} "restoration warning: size of 'ipbus/README' is not 539"
fi
fi
# ============= ipbus_addr_decode.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_addr_decode.vhd'
then
${echo} "x - SKIPPING ipbus_addr_decode.vhd (file already exists)"

else
${echo} "x - extracting ipbus_addr_decode.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_addr_decode.vhd' &&
-- Address decode logic for ipbus fabric
--
-- This file has been AUTOGENERATED from the address table - do not hand edit
--
-- We assume the synthesis tool is clever enough to recognise exclusive conditions
-- in the if statement.
--
-- Dave Newbold, February 2011
X
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
use work.ipbus.all;
X
package ipbus_addr_decode is
X
X function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer;
X
end ipbus_addr_decode;
X
package body ipbus_addr_decode is
X
X function ipbus_addr_sel(signal addr : in std_logic_vector(31 downto 0)) return integer is
X variable sel : integer;
X begin
X if std_match(addr, "---------------------------0----") then
X sel := 0; -- buggy / base 00000000 / mask 00000001
X elsif std_match(addr, "---------------------------1----") then
X sel := 1; -- regs / base 00000010 / mask 0000000f
X else
X sel := 99;
X end if;
X return sel;
X end ipbus_addr_sel;
X
end ipbus_addr_decode;
SHAR_EOF
(set 20 15 02 05 14 49 38 'ipbus_addr_decode.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_addr_decode.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_addr_decode.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_addr_decode.vhd': 'MD5 check failed'
) << \SHAR_EOF
d3177ed598ad0d06786c4dee400f8ffa ipbus_addr_decode.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_addr_decode.vhd'` -ne 993 && \
${echo} "restoration warning: size of 'ipbus_addr_decode.vhd' is not 993"

X variable sync_with_slope : boolean := false;
X variable status : boolean := false;

X variable data : out std_logic_vector((datawidth-1) downto 0);
X variable status : out boolean
X ) is
X begin -- ipbus_read
X if sync_with_slope = false then
X wait until rising_edge(ipb_clk);
X sync_with_slope := true;
X end if;

X ipb_out.ipb_addr <= address;
X ipb_out.ipb_write <= '0';
X ipb_out.ipb_strobe <= '1';

X lr1: loop
X wait until rising_edge(ipb_clk);
X if ipb_in.ipb_ack = '1' then
X data := ipb_in.ipb_rdata;
X status := true;
X exit lr1;
X end if;
X if ipb_in.ipb_err = '1' then
X data := (others => '0');
X status := false;
X exit lr1;

X end if;
X end loop;

X ipb_out.ipb_strobe <= '0';

X end bus_read;
X
X procedure bus_write (
X variable address : in std_logic_vector((addrwidth-1) downto 0);

X variable data : in std_logic_vector((datawidth-1) downto 0);
X variable status : out boolean
X ) is

X begin
X --report "Started bus_write" severity note;

X if sync_with_slope = false then
X wait until rising_edge(ipb_clk);
X sync_with_slope := true;
X end if;

X ipb_out.ipb_addr <= address;
X ipb_out.ipb_wdata <= data;
X ipb_out.ipb_write <= '1';
X ipb_out.ipb_strobe <= '1';

X lw1: loop
X wait until rising_edge(ipb_clk);
X if ipb_in.ipb_ack = '1' then
X status := true;
X exit lw1;
X end if;
X if ipb_in.ipb_err = '1' then
X status := false;
X exit lw1;

X end if;
X end loop;

X ipb_out.ipb_strobe <= '0';
X ipb_out.ipb_write <= '0';

X end bus_write;
X
X variable delay : integer;
X variable data : std_logic_vector(31 downto 0);
X variable address : std_logic_vector(31 downto 0);
X
X begin -- process
X file_open(write_pipe, wrpipename, read_mode);
X file_open(read_pipe, rdpipename, write_mode);
X ipb_out <= IPB_WBUS_NULL;
X while not endfile(write_pipe) loop
X -- We read the command from the wrpipe
X readline (write_pipe, rd_line);
X -- Analyze the line (Waddress,data)
X read (rd_line, code);
X case code is
X when 'W' =>
X read_hex_stlv(rd_line, addrwidth, address);
X read (rd_line, code);
X if code /= ',' then
X assert(false)
X report "Error: wrong separator in the write command" severity error;
X end if;
X read_hex_stlv(rd_line, datawidth, data);

X bus_write(address, data,status);
X if status then
X write(wr_line,string'("ACK"));
X else
X write(wr_line,string'("ERR"));
X end if;
X writeline(read_pipe, wr_line);

X when 'R' =>
X read_hex_stlv(rd_line, addrwidth, address);

X bus_read(address, data,status);
X if status then
X write_stlv_hex(wr_line, data);
X else
X write(wr_line,string'("ERR"));
X end if;

X writeline(read_pipe, wr_line);
X when 'T' =>
X read_hex_stlv(rd_line,32,data);
X delay := to_integer(unsigned(data));

X wait for delay * 1 ns;
X sync_with_slope := false;

X when others =>
X assert(false)
X report "Error: wrong character at the begining of the line" severity error;
X end case;
X end loop;
X wait;
X end process;
X
X
end simul;
SHAR_EOF

(set 20 15 02 05 16 41 30 'ipbus_ctrl.vhd'

eval "${shar_touch}") && \
chmod 0644 'ipbus_ctrl.vhd'
if test $? -ne 0
then ${echo} "restore of ipbus_ctrl.vhd failed"
fi
if ${md5check}
then (
${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_ctrl.vhd': 'MD5 check failed'
) << \SHAR_EOF

f711d72ff4f1e1082f51a7c221785819 ipbus_ctrl.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_ctrl.vhd'` -ne 8393 && \
${echo} "restoration warning: size of 'ipbus_ctrl.vhd' is not 8393"
fi
fi
# ============= ipbus_test.py ==============
if test -n "${keep_file}" && test -f 'ipbus_test.py'
then
${echo} "x - SKIPPING ipbus_test.py (file already exists)"

else
${echo} "x - extracting ipbus_test.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.py' &&
#!/usr/bin/python
X
import cbus
nodes=cbus.cbus_read_nodes('ipbus_test.xml')
ival1=nodes['IVAL1']
ival2=nodes['IVAL2']
ival3=nodes['IVAL3']
oval1=nodes['OVAL1']
oval2=nodes['OVAL2']
oval3=nodes['OVAL3']
buggy=nodes['BUGGY']
cbus.bus_delay(250)
oval1.write(0x13)
oval2.write(0x7)
oval3.write(0x31230000)
cbus.bus_delay(250)
print hex(ival1.read())
print hex(ival2.read())
print hex(ival3.read())
#Access below should generate an exception
buggy.write(3)
X
X
SHAR_EOF
(set 20 15 02 05 16 36 28 'ipbus_test.py'

eval "${shar_touch}") && \

chmod 0744 'ipbus_test.py'

if test $? -ne 0

then ${echo} "restore of ipbus_test.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.py': 'MD5 check failed'
) << \SHAR_EOF
d556f3011b707f0c2e7d3c3873457077 ipbus_test.py
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test.py'` -ne 454 && \
${echo} "restoration warning: size of 'ipbus_test.py' is not 454"
fi
fi
# ============= ipbus_test.sh ==============
if test -n "${keep_file}" && test -f 'ipbus_test.sh'
then
${echo} "x - SKIPPING ipbus_test.sh (file already exists)"

else
${echo} "x - extracting ipbus_test.sh (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.sh' &&
#!/bin/bash
set -e
rm -f /tmp/rdpipe /tmp/wrpipe

# Create the named pipes

mknod /tmp/rdpipe p
mknod /tmp/wrpipe p

# Run the python script in the other xterm

xterm -e "python ipbus_test.py; echo 'press ENTER'; read" &
SHAR_EOF
(set 20 15 02 05 13 41 22 'ipbus_test.sh'

eval "${shar_touch}") && \

chmod 0744 'ipbus_test.sh'

if test $? -ne 0

then ${echo} "restore of ipbus_test.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.sh': 'MD5 check failed'
) << \SHAR_EOF
359a29f4ef86cce08467ae4f70ef6cf0 ipbus_test.sh
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test.sh'` -ne 217 && \
${echo} "restoration warning: size of 'ipbus_test.sh' is not 217"
fi
fi
# ============= ipbus_test_top_tb.sav ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top_tb.sav'
then
${echo} "x - SKIPPING ipbus_test_top_tb.sav (file already exists)"

else
${echo} "x - extracting ipbus_test_top_tb.sav (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test_top_tb.sav' &&
[*]
[*] GTKWave Analyzer v3.3.62 (w)1999-2014 BSI
[*] Thu Feb 5 15:43:16 2015
[*]
[dumpfile] "/tmp/rrr/ipbus_test_top_tb.ghw"
[dumpfile_mtime] "Thu Feb 5 15:42:41 2015"
[dumpfile_size] 8180
[savefile] "/tmp/rrr/ipbus_test_top_tb.sav"
[timestart] 0
[size] 1600 853
[pos] -601 -250
*-27.867605 1020000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] top.
[treeopen] top.ipbus_test_top_tb.
[treeopen] top.ipbus_test_top_tb.dut.
[treeopen] top.ipbus_test_top_tb.dut.ipb_master_in.
[treeopen] top.ipbus_test_top_tb.dut.ipb_master_out.
[sst_width] 210
[signals_width] 150
[sst_expanded] 1
[sst_vpaned_height] 243
@28
top.ipbus_test_top_tb.dut.ipb_master_in.ipb_err
top.ipbus_test_top_tb.dut.ipb_master_in.ipb_ack
top.ipbus_test_top_tb.dut.ipb_master_out.ipb_write
top.ipbus_test_top_tb.dut.ipb_master_out.ipb_strobe
@22
#{top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[31:0]} top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[31] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[30] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[29] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[28] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[27] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[26] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[25] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[24] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[23] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[22] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[21] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[20] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[19] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[18] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[17] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[16] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[15] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[14] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[13] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[12] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[11] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[10] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[9] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[8] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[7] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[6] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[5] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[4] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[3] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[2] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[1] top.ipbus_test_top_tb.dut.ipb_master_in.ipb_rdata[0]
#{top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[31:0]} top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[31] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[30] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[29] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[28] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[27] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[26] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[25] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[24] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[23] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[22] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[21] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[20] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[19] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[18] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[17] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[16] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[15] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[14] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[13] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[12] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[11] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[10] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[9] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[8] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[7] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[6] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[5] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[4] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[3] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[2] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[1] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_addr[0]
#{top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[31:0]} top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[31] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[30] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[29] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[28] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[27] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[26] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[25] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[24] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[23] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[22] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[21] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[20] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[19] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[18] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[17] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[16] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[15] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[14] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[13] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[12] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[11] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[10] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[9] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[8] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[7] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[6] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[5] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[4] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[3] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[2] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[1] top.ipbus_test_top_tb.dut.ipb_master_out.ipb_wdata[0]
@28
top.ipbus_test_top_tb.ipb_clk
[pattern_trace] 1
[pattern_trace] 0
SHAR_EOF
(set 20 15 02 05 16 43 16 'ipbus_test_top_tb.sav'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top_tb.sav'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top_tb.sav failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top_tb.sav': 'MD5 check failed'
) << \SHAR_EOF
5319d530a54e5b277c17b6d48d73f163 ipbus_test_top_tb.sav
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test_top_tb.sav'` -ne 6294 && \
${echo} "restoration warning: size of 'ipbus_test_top_tb.sav' is not 6294"
fi
fi
# ============= ipbus_test_top_tb.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top_tb.vhd'
then
${echo} "x - SKIPPING ipbus_test_top_tb.vhd (file already exists)"

else
${echo} "x - extracting ipbus_test_top_tb.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test_top_tb.vhd' &&
-------------------------------------------------------------------------------
-- Title : Testbench for design "ipbus_test_top"
-- Project :
-------------------------------------------------------------------------------
-- File : ipbus_test_top_tb.vhd
-- Author : Wojciech Zabołotny <wz...@WZlap.nasz.dom>
-- Company :
-- Created : 2015-02-05
-- Last update: 2015-02-05
-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description:
-------------------------------------------------------------------------------
-- Copyright (c) 2015

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2015-02-05 1.0 wzab Created
-------------------------------------------------------------------------------

X
library ieee;
use ieee.std_logic_1164.all;

X
-------------------------------------------------------------------------------
X
entity ipbus_test_top_tb is
X
end entity ipbus_test_top_tb;
X
-------------------------------------------------------------------------------
X
architecture test1 of ipbus_test_top_tb is

X
X -- component generics

X constant rdpipename : string := "/tmp/rdpipe";
X constant wrpipename : string := "/tmp/wrpipe";

X
X -- component ports

X signal ipb_rst : std_logic := '1';
X signal ipb_clk : std_logic;

X
X -- clock
X signal Clk : std_logic := '1';
X

begin -- architecture test1

X
X -- component instantiation

X DUT: entity work.ipbus_test_top
X generic map (

X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X ipb_rst => ipb_rst,
X ipb_clk => ipb_clk);
X
X -- clock generation
X Clk <= not Clk after 30 ns;
X
X ipb_clk <= Clk;
X -- waveform generation
X WaveGen_Proc: process
X begin
X -- insert signal assignments here
X wait until Clk = '1';
X wait for 100 ns;
X ipb_rst <= '0';
X wait;
X end process WaveGen_Proc;
X
X
X
end architecture test1;
X
-------------------------------------------------------------------------------
X
configuration ipbus_test_top_tb_test1_cfg of ipbus_test_top_tb is
X for test1
X end for;
end ipbus_test_top_tb_test1_cfg;
X
-------------------------------------------------------------------------------
SHAR_EOF
(set 20 15 02 05 16 36 09 'ipbus_test_top_tb.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top_tb.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top_tb.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top_tb.vhd': 'MD5 check failed'
) << \SHAR_EOF
b6b2b05e8fd8b0d212b78d2c402c9597 ipbus_test_top_tb.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test_top_tb.vhd'` -ne 2297 && \
${echo} "restoration warning: size of 'ipbus_test_top_tb.vhd' is not 2297"
fi
fi
# ============= ipbus_test_top.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top.vhd'
then
${echo} "x - SKIPPING ipbus_test_top.vhd (file already exists)"

else
${echo} "x - extracting ipbus_test_top.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test_top.vhd' &&

-- Code used to implement the emulated bus
-- according to method publicly disclosed by W.M.Zabolotny in 2007
-- Usenet alt.sources "Bus controller model for VHDL & Python cosimulation"
X
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use std.textio.all;
use work.ipbus.all;
library work;
X

entity ipbus_test_top is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X ipb_rst : in std_logic;

X ipb_clk : in std_logic
X );
X

end ipbus_test_top;
X
architecture simul of ipbus_test_top is

X
X constant addrwidth, datawidth : integer := 32;
X

X signal ipb_master_out : ipb_wbus;
X signal ipb_master_in : ipb_rbus;
X signal in_val1 : unsigned(3 downto 0);
X signal in_val2 : unsigned(7 downto 0);
X signal in_val3 : unsigned(31 downto 0);
X signal out_val1 : unsigned(15 downto 0);
X signal out_val2 : unsigned(7 downto 0);
X signal out_val3 : unsigned(31 downto 0);

X
begin -- simul
X

X slaves_1: entity work.slaves
X port map (
X ipb_clk => ipb_clk,
X ipb_rst => ipb_rst,
X ipb_in => ipb_master_out,
X ipb_out => ipb_master_in,
X in_val1 => in_val1,
X in_val2 => in_val2,
X in_val3 => in_val3,
X out_val1 => out_val1,
X out_val2 => out_val2,
X out_val3 => out_val3);
X
X in_val1 <= x"a";
X in_val2 <= out_val2;
X in_val3 <= out_val3 + out_val1;
X
X ipbus_ctrl_1: entity work.ipbus_ctrl
X generic map (

X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X ipb_out => ipb_master_out,
X ipb_in => ipb_master_in,
X ipb_clk => ipb_clk);
X
end simul;
SHAR_EOF
(set 20 15 02 05 13 38 21 'ipbus_test_top.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top.vhd': 'MD5 check failed'
) << \SHAR_EOF
3345f70f0717acddf37dea57db6ac7f8 ipbus_test_top.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test_top.vhd'` -ne 1618 && \
${echo} "restoration warning: size of 'ipbus_test_top.vhd' is not 1618"
fi
fi
# ============= ipbus_test.xml ==============
if test -n "${keep_file}" && test -f 'ipbus_test.xml'
then
${echo} "x - SKIPPING ipbus_test.xml (file already exists)"

else
${echo} "x - extracting ipbus_test.xml (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.xml' &&
<?xml version="1.0" encoding="ISO-8859-1"?>
<node>
X <node id="IVAL1" address="0x00000012" mask="0x0000000f" permission="r" />
X <node id="IVAL2" address="0x00000012" mask="0x00000ff0" permission="r" />
X <node id="IVAL3" address="0x00000013" permission="r" />
X <node id="OVAL1" address="0x00000010" mask="0x000000ff" permission="rw" />
X <node id="OVAL2" address="0x00000010" mask="0x00000f00" permission="rw" />
X <node id="OVAL3" address="0x00000011" permission="rw" />
X <node id="BUGGY" address="0x00000000" permission="rw" />
</node>
SHAR_EOF
(set 20 15 02 05 14 52 46 'ipbus_test.xml'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test.xml'

if test $? -ne 0

then ${echo} "restore of ipbus_test.xml failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.xml': 'MD5 check failed'
) << \SHAR_EOF
94f7ae4be351d16299f08d9beafd7aa8 ipbus_test.xml
SHAR_EOF

else
test `LC_ALL=C wc -c < 'ipbus_test.xml'` -ne 555 && \
${echo} "restoration warning: size of 'ipbus_test.xml' is not 555"
fi
fi
# ============= makefile ==============
if test -n "${keep_file}" && test -f 'makefile'
then
${echo} "x - SKIPPING makefile (file already exists)"

else
${echo} "x - extracting makefile (text)"
sed 's/^X//' << 'SHAR_EOF' > 'makefile' &&
STD=synopsys
VSTD=93c
ENTITY=ipbus_test_top_tb
RUN_OPTIONS= --stop-time=2900ns --wave=${ENTITY}.ghw
#RUN_OPTIONS= --stop-time=290000ns
#RUN_OPTIONS= --wave=${ENTITY}.ghw
SOURCES = \
X ipbus/ipbus_package.vhd \
X ipbus/ipbus_reg_types.vhd \
X ipbus_addr_decode.vhd \
X ipbus/ipbus_fabric.vhd \
X ipbus/ipbus_ctrlreg_v.vhd \
X slaves.vhd \
X ipbus_ctrl.vhd \
X ipbus_test_top.vhd \
X ipbus_test_top_tb.vhd \
X
OBJECTS=$(SOURCES:.vhd=.o)
X
%.o : %.vhd
X ghdl -a -g -C --std=${VSTD} --ieee=${STD} $<
# ghdl -a -g -C --workdir=comp --std=${VSTD} --ieee=${STD} $<
X
#--trace-signals --trace-processes
#RUN_OPTIONS=
#--trace-processes
all: show
show: ${ENTITY} ${ENTITY}.ghw
X gtkwave ${ENTITY}.ghw ${ENTITY}.sav
${ENTITY}: $(SOURCES:.vhd=.o)
# vhdlp -work fmf fmf/*.vhd
# ghdl -e -g --mb-comments --workdir=comp --std=${VSTD} -fexplicit --ieee=${STD} ${ENTITY}
X ghdl -e -g --mb-comments --std=${VSTD} -fexplicit --ieee=${STD} ${ENTITY}
${ENTITY}.ghw: ${ENTITY}
# ./${ENTITY} --wave=${ENTITY}.ghw ${RUN_OPTIONS} --stop-time=50000ns 2>&1 > res.txt
X ./${ENTITY} ${RUN_OPTIONS}
#> res.txt 2>&1
clean:
X rm -f comp/* *.o *.vcd *.ghw events* ${ENTITY}
X
SHAR_EOF
(set 20 15 02 05 16 43 55 'makefile'

eval "${shar_touch}") && \

chmod 0644 'makefile'

if test $? -ne 0

then ${echo} "restore of makefile failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'makefile': 'MD5 check failed'
) << \SHAR_EOF
b26c925e8ab1e58f7ed5df34316cd81d makefile
SHAR_EOF

else
test `LC_ALL=C wc -c < 'makefile'` -ne 1148 && \
${echo} "restoration warning: size of 'makefile' is not 1148"
fi
fi
# ============= README ==============
if test -n "${keep_file}" && test -f 'README'
then
${echo} "x - SKIPPING README (file already exists)"

else
${echo} "x - extracting README (text)"
sed 's/^X//' << 'SHAR_EOF' > 'README' &&
The ipbus_addr_decode.vhd file is created from the addr_table file
using the script addr_dec.py, found in directory:
ipbus_2_0_v1/firmware/ipbus_core/scripts/addr_dec
after downloading the firmware sources with
$svn co http://svn.cern.ch/guest/cactus/tags/ipbus_fw/ipbus_2_0_v1
X
You'll also need the ipbus_addr_decode.vhd.tmpl from the same
directory, and the bitstring.py file, which you can find here:
https://code.google.com/p/python-bitstring/
or at direct link: https://pypi.python.org/packages/source/b/bitstring/bitstring-3.1.3.zip#md5=1db5d54ee269f6b54d50c3eb257eea4b
X
X
SHAR_EOF
(set 20 15 02 05 17 04 56 'README'

eval "${shar_touch}") && \

chmod 0644 'README'

if test $? -ne 0

then ${echo} "restore of README failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'README': 'MD5 check failed'
) << \SHAR_EOF
bbe6c4e1891e70b600702963cecedc04 README
SHAR_EOF

else
test `LC_ALL=C wc -c < 'README'` -ne 578 && \
${echo} "restoration warning: size of 'README' is not 578"
fi
fi
# ============= slaves.vhd ==============
if test -n "${keep_file}" && test -f 'slaves.vhd'
then
${echo} "x - SKIPPING slaves.vhd (file already exists)"

else
${echo} "x - extracting slaves.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'slaves.vhd' &&
-- The ipbus slaves live in this entity - modify according to requirements
--
-- Ports can be added to give ipbus slaves access to the chip top level.
--
-- Dave Newbold, February 2011
X
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
use work.ipbus.all;
use work.ipbus_reg_types.all;
X
entity slaves is
X port(
X ipb_clk : in std_logic;
X ipb_rst : in std_logic;
X ipb_in : in ipb_wbus;
X ipb_out : out ipb_rbus;
X -- Portd used to communicate with the core
X in_val1 : in unsigned(3 downto 0);
X in_val2 : in unsigned(7 downto 0);
X in_val3 : in unsigned(31 downto 0);
X out_val1 : out unsigned(15 downto 0);
X out_val2 : out unsigned(7 downto 0);
X out_val3 : out unsigned(31 downto 0)
X );
X
end slaves;
X
architecture rtl of slaves is
X
X constant NSLV : positive := 2;
X constant N_CTRL : positive := 2;
X constant N_STAT : positive := 2;
X signal ipbw : ipb_wbus_array(NSLV-1 downto 0);
X signal ipbr, ipbr_d : ipb_rbus_array(NSLV-1 downto 0);
X signal ctrl_reg : ipb_reg_v(N_CTRL-1 downto 0);
X signal stat_reg : ipb_reg_v(N_STAT-1 downto 0);
X
begin
X
X fabric : entity work.ipbus_fabric
X generic map(NSLV => NSLV)
X port map(
X ipb_in => ipb_in,
X ipb_out => ipb_out,
X ipb_to_slaves => ipbw,
X ipb_from_slaves => ipbr
X );
X
X -- slave0
X -- We simply generate error, when an attempt is taken to contact slave0
X ipbr(0).ipb_err <= ipbw(0).ipb_strobe;
X
X slave1 : entity work.ipbus_ctrlreg_v
X generic map (
X N_CTRL => N_CTRL,
X N_STAT => N_STAT)
X port map (
X clk => ipb_clk,
X reset => ipb_rst,
X ipbus_in => ipbw(1),
X ipbus_out => ipbr(1),
X d => stat_reg,
X q => ctrl_reg,
X stb => open);
-- Assignment of signals
X stat_reg(0)(3 downto 0) <= std_logic_vector(in_val1);
X stat_reg(0)(11 downto 4) <= std_logic_vector(in_val2);
X stat_reg(1) <= std_logic_vector(in_val3);
X out_val1 <= unsigned(ctrl_reg(0)(15 downto 0));
X out_val2 <= unsigned(ctrl_reg(0)(23 downto 16));
X out_val3 <= unsigned(ctrl_reg(1));
end rtl;
SHAR_EOF
(set 20 15 02 05 14 52 20 'slaves.vhd'

eval "${shar_touch}") && \

chmod 0644 'slaves.vhd'

if test $? -ne 0

then ${echo} "restore of slaves.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'slaves.vhd': 'MD5 check failed'
) << \SHAR_EOF
e6cd910edba238925bc7748e78e311ee slaves.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'slaves.vhd'` -ne 2225 && \
${echo} "restoration warning: size of 'slaves.vhd' is not 2225"

Wojciech M. Zabolotny

unread,

Feb 5, 2015, 2:21:24 PM2/5/15

Archive-name: ipbus-cbus
Version: 1.1

Submitted-by: wz...@ise.pw.edu.pl (Wojciech M. Zabolotny)

lock_dir=_sh03435
# Made on 2015-02-05 17:06 CET by <wz...@ise.pw.edu.pl>.
# Source directory was '/tmp/publish'.

#
# Existing files will *not* be overwritten, unless '-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------

# ============= addr_table ==============
if test -n "${keep_file}" && test -f 'addr_table'
then
${echo} "x - SKIPPING addr_table (file already exists)"

else

${echo} "x - extracting addr_table (text)"
sed 's/^X//' << 'SHAR_EOF' > 'addr_table' &&
# Example addr_table file to show the format
#
# num name base addr_width
0 buggy 0x00 1
1 regs 0x10 4
X

X
SHAR_EOF

(set 20 15 02 05 14 49 36 'addr_table'

eval "${shar_touch}") && \

chmod 0644 'addr_table'

if test $? -ne 0

then ${echo} "restore of addr_table failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'addr_table': 'MD5 check failed'
) << \SHAR_EOF
0fae91a26f21834a708c1c9e6cc6bcfe addr_table
SHAR_EOF

else

test `LC_ALL=C wc -c < 'addr_table'` -ne 126 && \
${echo} "restoration warning: size of 'addr_table' is not 126"
fi

X s=rdpip.readline()
X if s.strip()=="ACK":
X return
X else:
X raise Exception("Wrong status returned:"+s.strip())

def bus_read(adr):
X cmd="R"+("%8.8x" % adr)+"\n"
X wrpip.write(cmd)
X wrpip.flush()
X s=rdpip.readline()

X if s.strip()=="ERR":
X raise Exception("Error status returned")

(set 20 15 02 05 11 56 55 'cbus.py'

86a4c0a5025dda75f4c30dfa5ed09d98 cbus.py
SHAR_EOF

else

test `LC_ALL=C wc -c < 'cbus.py'` -ne 2608 && \
${echo} "restoration warning: size of 'cbus.py' is not 2608"
fi
fi
# ============= ipbus/README ==============
if test ! -d 'ipbus'; then
mkdir 'ipbus'
if test $? -eq 0
then ${echo} "x - created directory ipbus."
else ${echo} "x - failed to create directory ipbus."
exit 1
fi
fi

if test -n "${keep_file}" && test -f 'ipbus/README'
then
${echo} "x - SKIPPING ipbus/README (file already exists)"

else

${echo} "x - extracting ipbus/README (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus/README' &&
In this directory you should place files:
ipbus_ctrlreg_v.vhd ipbus_fabric.vhd ipbus_package.vhd ipbus_reg_types.vhd
from original IPbus firmware.
X
You can get them as described in the
https://svnweb.cern.ch/trac/cactus/wiki/IPbusFirmware
X
by downloading all firmware sources:
$ svn co http://svn.cern.ch/guest/cactus/tags/ipbus_fw/ipbus_2_0_v1
X
ipbus_fabric.vhd and ipbus_package.vhd you'll find in:
ipbus_2_0_v1/firmware/ipbus_core/hdl
X
ipbus_ctrlreg_v.vhd and ipbus_reg_types.vhd you'll find in:
ipbus_2_0_v1/firmware/slaves/hdl
S

SHAR_EOF

(set 20 15 02 05 16 50 52 'ipbus/README'

eval "${shar_touch}") && \

chmod 0644 'ipbus/README'

if test $? -ne 0

then ${echo} "restore of ipbus/README failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus/README': 'MD5 check failed'
) << \SHAR_EOF
b443e68fc5a6f632d9b2467dd365c108 ipbus/README
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus/README'` -ne 539 && \
${echo} "restoration warning: size of 'ipbus/README' is not 539"
fi
fi

# ============= ipbus_addr_decode.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_addr_decode.vhd'
then
${echo} "x - SKIPPING ipbus_addr_decode.vhd (file already exists)"

else

SHAR_EOF

(set 20 15 02 05 14 49 38 'ipbus_addr_decode.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_addr_decode.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_addr_decode.vhd failed"

fi
if ${md5check}
then (

X variable sync_with_slope : boolean := false;
X variable status : boolean := false;

X variable data : out std_logic_vector((datawidth-1) downto 0);
X variable status : out boolean

X ) is
X begin -- ipbus_read

X if sync_with_slope = false then
X wait until rising_edge(ipb_clk);
X sync_with_slope := true;
X end if;

X ipb_out.ipb_addr <= address;
X ipb_out.ipb_write <= '0';
X ipb_out.ipb_strobe <= '1';

X lr1: loop
X wait until rising_edge(ipb_clk);
X if ipb_in.ipb_ack = '1' then

X data := ipb_in.ipb_rdata;

X status := true;
X exit lr1;

X end if;

X if ipb_in.ipb_err = '1' then
X data := (others => '0');
X status := false;
X exit lr1;

X end if;
X end loop;

X ipb_out.ipb_strobe <= '0';

X end bus_read;
X
X procedure bus_write (
X variable address : in std_logic_vector((addrwidth-1) downto 0);

X variable data : in std_logic_vector((datawidth-1) downto 0);

X variable status : out boolean

X ) is

X begin
X --report "Started bus_write" severity note;

X if sync_with_slope = false then
X wait until rising_edge(ipb_clk);
X sync_with_slope := true;
X end if;

X ipb_out.ipb_addr <= address;
X ipb_out.ipb_wdata <= data;
X ipb_out.ipb_write <= '1';
X ipb_out.ipb_strobe <= '1';

X lw1: loop
X wait until rising_edge(ipb_clk);
X if ipb_in.ipb_ack = '1' then
X status := true;
X exit lw1;

X end if;

X if ipb_in.ipb_err = '1' then
X status := false;
X exit lw1;

X end if;
X end loop;

X ipb_out.ipb_strobe <= '0';
X ipb_out.ipb_write <= '0';

X bus_write(address, data,status);
X if status then
X write(wr_line,string'("ACK"));
X else
X write(wr_line,string'("ERR"));
X end if;

X writeline(read_pipe, wr_line);

X when 'R' =>
X read_hex_stlv(rd_line, addrwidth, address);

X bus_read(address, data,status);
X if status then
X write_stlv_hex(wr_line, data);
X else
X write(wr_line,string'("ERR"));
X end if;

X writeline(read_pipe, wr_line);
X when 'T' =>
X read_hex_stlv(rd_line,32,data);
X delay := to_integer(unsigned(data));

X wait for delay * 1 ns;
X sync_with_slope := false;

X when others =>
X assert(false)
X report "Error: wrong character at the begining of the line" severity error;
X end case;
X end loop;
X wait;
X end process;
X
X
end simul;
SHAR_EOF

(set 20 15 02 05 16 41 30 'ipbus_ctrl.vhd'

f711d72ff4f1e1082f51a7c221785819 ipbus_ctrl.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_ctrl.vhd'` -ne 8393 && \
${echo} "restoration warning: size of 'ipbus_ctrl.vhd' is not 8393"
fi
fi

# ============= ipbus_test.py ==============
if test -n "${keep_file}" && test -f 'ipbus_test.py'
then
${echo} "x - SKIPPING ipbus_test.py (file already exists)"

else

${echo} "x - extracting ipbus_test.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.py' &&
#!/usr/bin/python
X
import cbus
nodes=cbus.cbus_read_nodes('ipbus_test.xml')
ival1=nodes['IVAL1']
ival2=nodes['IVAL2']
ival3=nodes['IVAL3']
oval1=nodes['OVAL1']
oval2=nodes['OVAL2']
oval3=nodes['OVAL3']
buggy=nodes['BUGGY']
cbus.bus_delay(250)
oval1.write(0x13)
oval2.write(0x7)
oval3.write(0x31230000)
cbus.bus_delay(250)
print hex(ival1.read())
print hex(ival2.read())
print hex(ival3.read())
#Access below should generate an exception
buggy.write(3)
X

X
SHAR_EOF

(set 20 15 02 05 16 36 28 'ipbus_test.py'

eval "${shar_touch}") && \

chmod 0744 'ipbus_test.py'

if test $? -ne 0

then ${echo} "restore of ipbus_test.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.py': 'MD5 check failed'
) << \SHAR_EOF
d556f3011b707f0c2e7d3c3873457077 ipbus_test.py
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test.py'` -ne 454 && \
${echo} "restoration warning: size of 'ipbus_test.py' is not 454"
fi
fi

# ============= ipbus_test.sh ==============
if test -n "${keep_file}" && test -f 'ipbus_test.sh'
then
${echo} "x - SKIPPING ipbus_test.sh (file already exists)"

else

${echo} "x - extracting ipbus_test.sh (text)"

sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.sh' &&
#!/bin/bash
set -e
rm -f /tmp/rdpipe /tmp/wrpipe

# Create the named pipes

mknod /tmp/rdpipe p
mknod /tmp/wrpipe p

# Run the python script in the other xterm

xterm -e "python ipbus_test.py; echo 'press ENTER'; read" &
SHAR_EOF

(set 20 15 02 05 13 41 22 'ipbus_test.sh'

eval "${shar_touch}") && \

chmod 0744 'ipbus_test.sh'

if test $? -ne 0

then ${echo} "restore of ipbus_test.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.sh': 'MD5 check failed'
) << \SHAR_EOF
359a29f4ef86cce08467ae4f70ef6cf0 ipbus_test.sh
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test.sh'` -ne 217 && \
${echo} "restoration warning: size of 'ipbus_test.sh' is not 217"
fi
fi

# ============= ipbus_test_top_tb.sav ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top_tb.sav'
then
${echo} "x - SKIPPING ipbus_test_top_tb.sav (file already exists)"

else

SHAR_EOF

(set 20 15 02 05 16 43 16 'ipbus_test_top_tb.sav'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top_tb.sav'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top_tb.sav failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top_tb.sav': 'MD5 check failed'
) << \SHAR_EOF
5319d530a54e5b277c17b6d48d73f163 ipbus_test_top_tb.sav
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test_top_tb.sav'` -ne 6294 && \
${echo} "restoration warning: size of 'ipbus_test_top_tb.sav' is not 6294"
fi
fi

# ============= ipbus_test_top_tb.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top_tb.vhd'
then
${echo} "x - SKIPPING ipbus_test_top_tb.vhd (file already exists)"

else

${echo} "x - extracting ipbus_test_top_tb.vhd (text)"

sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test_top_tb.vhd' &&
-------------------------------------------------------------------------------
-- Title : Testbench for design "ipbus_test_top"
-- Project :
-------------------------------------------------------------------------------

-- File : ipbus_test_top_tb.vhd
-- Author : Wojciech Zabołotny <wz...@WZlap.nasz.dom>
-- Company :
-- Created : 2015-02-05
-- Last update: 2015-02-05

-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------
-- Description:
-------------------------------------------------------------------------------
-- Copyright (c) 2015

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2015-02-05 1.0 wzab Created
-------------------------------------------------------------------------------

X
library ieee;
use ieee.std_logic_1164.all;

X
X -- component generics

X constant rdpipename : string := "/tmp/rdpipe";
X constant wrpipename : string := "/tmp/wrpipe";

X
X -- component ports

X signal ipb_rst : std_logic := '1';
X signal ipb_clk : std_logic;

X
X -- clock
X signal Clk : std_logic := '1';
X

begin -- architecture test1

X
X -- component instantiation

X DUT: entity work.ipbus_test_top
X generic map (

X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X ipb_rst => ipb_rst,
X ipb_clk => ipb_clk);
X
X -- clock generation
X Clk <= not Clk after 30 ns;
X

X ipb_clk <= Clk;
X -- waveform generation
X WaveGen_Proc: process
X begin
X -- insert signal assignments here
X wait until Clk = '1';
X wait for 100 ns;
X ipb_rst <= '0';

X wait;

X end process WaveGen_Proc;
X
X
X
end architecture test1;
X
-------------------------------------------------------------------------------
X
configuration ipbus_test_top_tb_test1_cfg of ipbus_test_top_tb is
X for test1
X end for;
end ipbus_test_top_tb_test1_cfg;
X
-------------------------------------------------------------------------------

SHAR_EOF

(set 20 15 02 05 16 36 09 'ipbus_test_top_tb.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top_tb.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top_tb.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top_tb.vhd': 'MD5 check failed'
) << \SHAR_EOF
b6b2b05e8fd8b0d212b78d2c402c9597 ipbus_test_top_tb.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test_top_tb.vhd'` -ne 2297 && \
${echo} "restoration warning: size of 'ipbus_test_top_tb.vhd' is not 2297"
fi
fi

# ============= ipbus_test_top.vhd ==============
if test -n "${keep_file}" && test -f 'ipbus_test_top.vhd'
then
${echo} "x - SKIPPING ipbus_test_top.vhd (file already exists)"

else

${echo} "x - extracting ipbus_test_top.vhd (text)"

sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test_top.vhd' &&

entity ipbus_test_top is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X ipb_rst : in std_logic;

X ipb_clk : in std_logic
X );
X

end ipbus_test_top;
X
architecture simul of ipbus_test_top is

X
X constant addrwidth, datawidth : integer := 32;
X

X
begin -- simul
X

X slaves_1: entity work.slaves
X port map (

X ipb_clk => ipb_clk,
X ipb_rst => ipb_rst,
X ipb_in => ipb_master_out,
X ipb_out => ipb_master_in,
X in_val1 => in_val1,
X in_val2 => in_val2,
X in_val3 => in_val3,
X out_val1 => out_val1,
X out_val2 => out_val2,
X out_val3 => out_val3);
X
X in_val1 <= x"a";
X in_val2 <= out_val2;
X in_val3 <= out_val3 + out_val1;
X
X ipbus_ctrl_1: entity work.ipbus_ctrl

X generic map (

X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X ipb_out => ipb_master_out,
X ipb_in => ipb_master_in,
X ipb_clk => ipb_clk);

X
end simul;
SHAR_EOF

(set 20 15 02 05 13 38 21 'ipbus_test_top.vhd'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test_top.vhd'

if test $? -ne 0

then ${echo} "restore of ipbus_test_top.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test_top.vhd': 'MD5 check failed'
) << \SHAR_EOF
3345f70f0717acddf37dea57db6ac7f8 ipbus_test_top.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test_top.vhd'` -ne 1618 && \
${echo} "restoration warning: size of 'ipbus_test_top.vhd' is not 1618"
fi
fi

# ============= ipbus_test.xml ==============
if test -n "${keep_file}" && test -f 'ipbus_test.xml'
then
${echo} "x - SKIPPING ipbus_test.xml (file already exists)"

else

${echo} "x - extracting ipbus_test.xml (text)"
sed 's/^X//' << 'SHAR_EOF' > 'ipbus_test.xml' &&
<?xml version="1.0" encoding="ISO-8859-1"?>
<node>
X <node id="IVAL1" address="0x00000012" mask="0x0000000f" permission="r" />
X <node id="IVAL2" address="0x00000012" mask="0x00000ff0" permission="r" />
X <node id="IVAL3" address="0x00000013" permission="r" />
X <node id="OVAL1" address="0x00000010" mask="0x000000ff" permission="rw" />
X <node id="OVAL2" address="0x00000010" mask="0x00000f00" permission="rw" />
X <node id="OVAL3" address="0x00000011" permission="rw" />
X <node id="BUGGY" address="0x00000000" permission="rw" />
</node>

SHAR_EOF

(set 20 15 02 05 14 52 46 'ipbus_test.xml'

eval "${shar_touch}") && \

chmod 0644 'ipbus_test.xml'

if test $? -ne 0

then ${echo} "restore of ipbus_test.xml failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'ipbus_test.xml': 'MD5 check failed'
) << \SHAR_EOF
94f7ae4be351d16299f08d9beafd7aa8 ipbus_test.xml
SHAR_EOF

else

test `LC_ALL=C wc -c < 'ipbus_test.xml'` -ne 555 && \
${echo} "restoration warning: size of 'ipbus_test.xml' is not 555"
fi
fi

# ============= makefile ==============
if test -n "${keep_file}" && test -f 'makefile'
then
${echo} "x - SKIPPING makefile (file already exists)"

else

X
SHAR_EOF

(set 20 15 02 05 16 43 55 'makefile'

eval "${shar_touch}") && \

chmod 0644 'makefile'

if test $? -ne 0

then ${echo} "restore of makefile failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'makefile': 'MD5 check failed'
) << \SHAR_EOF
b26c925e8ab1e58f7ed5df34316cd81d makefile
SHAR_EOF

else

test `LC_ALL=C wc -c < 'makefile'` -ne 1148 && \
${echo} "restoration warning: size of 'makefile' is not 1148"
fi
fi

# ============= README ==============
if test -n "${keep_file}" && test -f 'README'
then
${echo} "x - SKIPPING README (file already exists)"

else

${echo} "x - extracting README (text)"
sed 's/^X//' << 'SHAR_EOF' > 'README' &&
The ipbus_addr_decode.vhd file is created from the addr_table file
using the script addr_dec.py, found in directory:
ipbus_2_0_v1/firmware/ipbus_core/scripts/addr_dec
after downloading the firmware sources with
$svn co http://svn.cern.ch/guest/cactus/tags/ipbus_fw/ipbus_2_0_v1
X
You'll also need the ipbus_addr_decode.vhd.tmpl from the same
directory, and the bitstring.py file, which you can find here:
https://code.google.com/p/python-bitstring/
or at direct link: https://pypi.python.org/packages/source/b/bitstring/bitstring-3.1.3.zip#md5=1db5d54ee269f6b54d50c3eb257eea4b
X

X
SHAR_EOF

(set 20 15 02 05 17 04 56 'README'

eval "${shar_touch}") && \

chmod 0644 'README'

if test $? -ne 0

then ${echo} "restore of README failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'README': 'MD5 check failed'
) << \SHAR_EOF
bbe6c4e1891e70b600702963cecedc04 README
SHAR_EOF

else

test `LC_ALL=C wc -c < 'README'` -ne 578 && \
${echo} "restoration warning: size of 'README' is not 578"
fi
fi

# ============= slaves.vhd ==============
if test -n "${keep_file}" && test -f 'slaves.vhd'
then
${echo} "x - SKIPPING slaves.vhd (file already exists)"

else

${echo} "x - extracting slaves.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'slaves.vhd' &&
-- The ipbus slaves live in this entity - modify according to requirements
--
-- Ports can be added to give ipbus slaves access to the chip top level.
--
-- Dave Newbold, February 2011
X
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
use work.ipbus.all;
use work.ipbus_reg_types.all;
X
entity slaves is
X port(

X ipb_clk : in std_logic;

X generic map (

X N_CTRL => N_CTRL,
X N_STAT => N_STAT)

X port map (

X clk => ipb_clk,
X reset => ipb_rst,
X ipbus_in => ipbw(1),
X ipbus_out => ipbr(1),
X d => stat_reg,
X q => ctrl_reg,
X stb => open);
-- Assignment of signals
X stat_reg(0)(3 downto 0) <= std_logic_vector(in_val1);
X stat_reg(0)(11 downto 4) <= std_logic_vector(in_val2);
X stat_reg(1) <= std_logic_vector(in_val3);
X out_val1 <= unsigned(ctrl_reg(0)(15 downto 0));
X out_val2 <= unsigned(ctrl_reg(0)(23 downto 16));
X out_val3 <= unsigned(ctrl_reg(1));
end rtl;

SHAR_EOF

(set 20 15 02 05 14 52 20 'slaves.vhd'

eval "${shar_touch}") && \

chmod 0644 'slaves.vhd'

if test $? -ne 0

then ${echo} "restore of slaves.vhd failed"

fi
if ${md5check}
then (

wza...@gmail.com

unread,

Nov 11, 2018, 9:58:40 AM11/11/18

In the newest GHDL, the files are buffered. To get the controller model working correctly, it is necessary to run ghdl with "--unbuffered" option. Otherwise the simulation hangs.

Regards,
Wojtek

Wojciech M. Zabołotny

unread,

Nov 11, 2018, 11:13:13 AM11/11/18

Archive-name: wishbone-cbus

Version: 1.1
Submitted-by: wz...@ise.pw.edu.pl (Wojciech M. Zabolotny)

Attached are the sources of the simple emulated Wishbone controller,
allowing you to test your Wishbone controlled system from Python
application, as described in http://dx.doi.org/10.1117/12.981877 .

After downloading and unpacking the archive, you should run
the prepare.sh script that downloads the necessary files
from OHWR general-cores repository.

After that you can start the simulation by running the wb_test.sh
script.
It will open new xterm window with Python application wb_test.py,
and then run the "make" command that will compile sources
and start simulation in GHDL. (Make sure, that GHDL is available
in PATH)

All my files in this archive are published as PUBLIC DOMAIN.

(The files downloaded to the general-cores directory have
their own licenses defined inside).

Good luck!
Wojtek

#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.15.2).

# To extract the files from this archive, save it to some FILE, remove
# everything before the '#!/bin/sh' line above, then type 'sh FILE'.
#

lock_dir=_sh20072
# Made on 2018-11-11 17:08 CET by <wzab@wzab>.
# Source directory was '/tmp/wb_cosim'.

#
# Existing files will *not* be overwritten, unless '-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------

# 3136 -rw-r--r-- my-cores/wb_test.vhd
# 2288 -rw-r--r-- my-cores/wb_test_top_tb.vhd
# 8888 -rw-r--r-- my-cores/sim_wb_ctrl.vhd
# 1769 -rw-r--r-- my-cores/wb_test_top.vhd
# 332 -rwxr--r-- prepare.sh
# 1258 -rw-r--r-- Makefile
# 722 -rwxr--r-- python/cbus.py
# 769 -rwxr--r-- python/wb_test.py
# 226 -rwxr--r-- wb_test.sh
# 13522 -rw-r--r-- wb_test_top_tb.sav

# ============= my-cores/wb_test.vhd ==============
if test ! -d 'my-cores'; then
mkdir 'my-cores'

if test $? -eq 0

then ${echo} "x - created directory my-cores."
else ${echo} "x - failed to create directory my-cores."
exit 1
fi
fi
if test -n "${keep_file}" && test -f 'my-cores/wb_test.vhd'
then
${echo} "x - SKIPPING my-cores/wb_test.vhd (file already exists)"

else
${echo} "x - extracting my-cores/wb_test.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test.vhd' &&
-------------------------------------------------------------------------------
-- Title : WB test slave
-- Project :
-------------------------------------------------------------------------------
-- File : wb_test.vhd
-- Author : FPGA Developer <x...@wzab.nasz.dom>
-- Company :
-- Created : 2018-04-16
-- Last update: 2018-11-11

-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------

-- Description: It just allows you to check in simulation if the access is correct
-------------------------------------------------------------------------------
-- Copyright (c) 2018

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2018-07-26 1.0 xl Created
-------------------------------------------------------------------------------
X
X

X
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

library work;
use work.wishbone_pkg.all;
X
entity wb_test_slvx is
X port (
X
X sys_clk_i : in std_logic;
X rst_i : in std_logic;
X slv_i : in t_wishbone_slave_in;
X slv_o : out t_wishbone_slave_out
X );
end wb_test_slvx;
X
X
architecture rtl of wb_test_slvx is
X
X type T_MEM is array (0 to 1023) of std_logic_vector(31 downto 0);
X signal mem : T_MEM := (others => (others => '0'));
X signal tst_counter : unsigned(31 downto 0) := (others => '0');
X
begin
X -- At the moment we do not generate errors nor stalls
X slv_o.rty <= '0';
X slv_o.err <= '0';
X slv_o.stall <= '0';
X
X process (sys_clk_i) is
X variable v_read : std_logic_vector(31 downto 0);
X begin -- process
X if sys_clk_i'event and sys_clk_i = '1' then -- rising clock edge
X if rst_i = '1' then -- synchronous reset (active high)
X v_read := (others => '0');
X slv_o.ack <= '0';
X slv_o.dat <= (others => '0');
X tst_counter <= (others => '0');
X else
X v_read := (others => '0');
X -- Decrement test counter
X if to_integer(tst_counter) /= 0 then
X tst_counter <= tst_counter - 1;
X end if;
X if(slv_i.stb = '1') then
X slv_o.ack <= '1';
X if slv_i.we = '1' then
X -- Write access
X if slv_i.adr(30) = '0' then
X -- simple memory
X mem(to_integer(unsigned(slv_i.adr(9 downto 0)))) <= slv_i.dat;
X else
X -- counter
X tst_counter <= unsigned(slv_i.dat);

X end if;
X else

X -- Read access
X if slv_i.adr(30) = '0' then
X v_read := mem(to_integer(unsigned(slv_i.adr(9 downto 0))));
X if slv_i.adr(31) = '1' then
X v_read := std_logic_vector(unsigned(v_read)+unsigned(slv_i.adr)+12);

X end if;
X else

X v_read := std_logic_vector(tst_counter);
X end if;
X end if;
X else
X slv_o.ack <= '0';
X end if;
X end if;
X slv_o.dat <= v_read;
X end if;
X end process;
X
end architecture rtl;
X
SHAR_EOF
(set 20 18 11 11 16 05 37 'my-cores/wb_test.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test.vhd': 'MD5 check failed'
) << \SHAR_EOF
439b701498f98098561cc7fba42f71a9 my-cores/wb_test.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'my-cores/wb_test.vhd'` -ne 3136 && \
${echo} "restoration warning: size of 'my-cores/wb_test.vhd' is not 3136"
fi
fi
# ============= my-cores/wb_test_top_tb.vhd ==============
if test ! -d 'my-cores'; then
mkdir 'my-cores'

if test $? -eq 0

then ${echo} "x - created directory my-cores."
else ${echo} "x - failed to create directory my-cores."
exit 1
fi
fi
if test -n "${keep_file}" && test -f 'my-cores/wb_test_top_tb.vhd'
then
${echo} "x - SKIPPING my-cores/wb_test_top_tb.vhd (file already exists)"

else
${echo} "x - extracting my-cores/wb_test_top_tb.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test_top_tb.vhd' &&
-------------------------------------------------------------------------------
-- Title : Testbench for design "wb_test_top"
-- Project :
-------------------------------------------------------------------------------
-- File : wb_test_top_tb.vhd
-- Author : Wojciech Zabołotny <wz...@wzab.nasz.dom>
-- Company :
-- Created : 2018-11-11
-- Last update: 2018-11-11

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2018-11-11 1.0 wzab Created

-------------------------------------------------------------------------------
X
library ieee;
use ieee.std_logic_1164.all;
X
-------------------------------------------------------------------------------
X

entity wb_test_top_tb is
X
end entity wb_test_top_tb;
X
-------------------------------------------------------------------------------
X
architecture test of wb_test_top_tb is

X
X -- component generics
X constant rdpipename : string := "/tmp/rdpipe";
X constant wrpipename : string := "/tmp/wrpipe";
X
X -- component ports

X signal rst_i : std_logic := '1';
X signal clk_sys_i : std_logic;

X
X -- clock
X signal Clk : std_logic := '1';
X
begin -- architecture test

X
X clk_sys_i <= clk;
X -- component instantiation
X DUT: entity work.wb_test_top

X generic map (
X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X rst_i => rst_i,
X clk_sys_i => clk_sys_i);

X
X -- clock generation

X Clk <= not Clk after 10 ns;
X

X -- waveform generation
X WaveGen_Proc: process
X begin
X -- insert signal assignments here

X rst_i <= '1';

X wait until Clk = '1';

X wait for 5 ns;
X rst_i <= '0';

X wait;
X end process WaveGen_Proc;
X
X
X

end architecture test;
X
-------------------------------------------------------------------------------
X
configuration wb_test_top_tb_test_cfg of wb_test_top_tb is
X for test
X end for;
end wb_test_top_tb_test_cfg;
X
-------------------------------------------------------------------------------
SHAR_EOF
(set 20 18 11 11 11 05 50 'my-cores/wb_test_top_tb.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test_top_tb.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test_top_tb.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test_top_tb.vhd': 'MD5 check failed'
) << \SHAR_EOF
77c23ccb1ca2a77b79d01808838f2e8d my-cores/wb_test_top_tb.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'my-cores/wb_test_top_tb.vhd'` -ne 2288 && \
${echo} "restoration warning: size of 'my-cores/wb_test_top_tb.vhd' is not 2288"
fi
fi
# ============= my-cores/sim_wb_ctrl.vhd ==============
if test -n "${keep_file}" && test -f 'my-cores/sim_wb_ctrl.vhd'
then
${echo} "x - SKIPPING my-cores/sim_wb_ctrl.vhd (file already exists)"

else
${echo} "x - extracting my-cores/sim_wb_ctrl.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'my-cores/sim_wb_ctrl.vhd' &&

use work.wishbone_pkg.all;
library work;
X
entity sim_wb_ctrl is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X wb_m_out : out t_wishbone_master_out;
X wb_m_in : in t_wishbone_master_in;
X clk_sys_i : in std_logic
X );
X
end sim_wb_ctrl;
X
architecture simul of sim_wb_ctrl is

X wait until rising_edge(clk_sys_i);

X sync_with_slope := true;
X end if;

X wb_m_out.adr <= address;
X wb_m_out.we <= '0';
X wb_m_out.stb <= '1';
X wb_m_out.cyc <= '1';
X lr1: loop
X wait until rising_edge(clk_sys_i);
X if wb_m_in.ack = '1' then
X data := wb_m_in.dat;

X status := true;
X exit lr1;
X end if;

X if wb_m_in.err = '1' then

X data := (others => '0');
X status := false;
X exit lr1;
X end if;
X end loop;

X wb_m_out.stb <= '0';
X wb_m_out.cyc <= '0';
X wait until rising_edge(clk_sys_i);

X end bus_read;
X
X procedure bus_write (
X variable address : in std_logic_vector((addrwidth-1) downto 0);
X variable data : in std_logic_vector((datawidth-1) downto 0);
X variable status : out boolean
X ) is
X begin
X --report "Started bus_write" severity note;
X if sync_with_slope = false then

X wait until rising_edge(clk_sys_i);

X sync_with_slope := true;
X end if;

X wb_m_out.adr <= address;
X wb_m_out.dat <= data;
X wb_m_out.we <= '1';
X wb_m_out.stb <= '1';
X wb_m_out.cyc <= '1';
X lw1: loop
X wait until rising_edge(clk_sys_i);
X if wb_m_in.ack = '1' then

X status := true;
X exit lw1;
X end if;

X if wb_m_in.err = '1' then

X status := false;
X exit lw1;
X end if;
X end loop;

X wb_m_out.stb <= '0';
X wb_m_out.cyc <= '0';
X wb_m_out.we <= '0';

X wb_m_out <= c_DUMMY_WB_MASTER_OUT;

X while not endfile(write_pipe) loop
X -- We read the command from the wrpipe
X readline (write_pipe, rd_line);
X -- Analyze the line (Waddress,data)
X read (rd_line, code);
X case code is
X when 'W' =>
X read_hex_stlv(rd_line, addrwidth, address);
X read (rd_line, code);
X if code /= ',' then
X assert(false)
X report "Error: wrong separator in the write command" severity error;
X end if;
X read_hex_stlv(rd_line, datawidth, data);
X bus_write(address, data,status);
X if status then
X write(wr_line,string'("ACK"));
X else
X write(wr_line,string'("ERR"));
X end if;
X writeline(read_pipe, wr_line);

X -- If you are using VHDL-2008, you may uncomment
X -- the flush command below, and run GHDL without
X -- "--unbuffered" option
X --flush(read_pipe);

X when 'R' =>
X read_hex_stlv(rd_line, addrwidth, address);
X bus_read(address, data,status);
X if status then
X write_stlv_hex(wr_line, data);
X else
X write(wr_line,string'("ERR"));
X end if;
X writeline(read_pipe, wr_line);

X -- If you are using VHDL-2008, you may uncomment
X -- the flush command below, and run GHDL without
X -- "--unbuffered" option
X --flush(read_pipe);

X when 'T' =>
X read_hex_stlv(rd_line,32,data);
X delay := to_integer(unsigned(data));
X wait for delay * 1 ns;
X sync_with_slope := false;
X when others =>
X assert(false)
X report "Error: wrong character at the begining of the line" severity error;
X end case;
X end loop;
X wait;
X end process;
X
X
end simul;
SHAR_EOF

(set 20 18 11 11 16 17 34 'my-cores/sim_wb_ctrl.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/sim_wb_ctrl.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/sim_wb_ctrl.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/sim_wb_ctrl.vhd': 'MD5 check failed'
) << \SHAR_EOF
e3f86640d8414233fb3b0fcd4aff4eb4 my-cores/sim_wb_ctrl.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'my-cores/sim_wb_ctrl.vhd'` -ne 8888 && \
${echo} "restoration warning: size of 'my-cores/sim_wb_ctrl.vhd' is not 8888"
fi
fi
# ============= my-cores/wb_test_top.vhd ==============
if test -n "${keep_file}" && test -f 'my-cores/wb_test_top.vhd'
then
${echo} "x - SKIPPING my-cores/wb_test_top.vhd (file already exists)"

else
${echo} "x - extracting my-cores/wb_test_top.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test_top.vhd' &&

use work.wishbone_pkg.all;
library work;
X
entity wb_test_top is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X rst_i : in std_logic;
X clk_sys_i : in std_logic
X );
X
end wb_test_top;
X
architecture simul of wb_test_top is

X
X constant addrwidth, datawidth : integer := 32;
X

X signal wb_m_out : t_wishbone_master_out_array(0 to 0);
X signal wb_m_in : t_wishbone_master_in_array(0 to 0);
X signal wb_s_out : t_wishbone_slave_out_array(0 to 0);
X signal wb_s_in : t_wishbone_slave_in_array(0 to 0);
X
X signal rst_n_i : std_logic;

X
begin -- simul
X

X rst_n_i <= not rst_i;
X wb_test_slvx_1: entity work.wb_test_slvx
X port map (
X sys_clk_i => clk_sys_i,
X rst_i => rst_i,
X slv_i => wb_s_in(0),
X slv_o => wb_s_out(0));
X
X sim_wb_ctrl_1: entity work.sim_wb_ctrl

X generic map (
X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X wb_m_out => wb_m_out(0),
X wb_m_in => wb_m_in(0),
X clk_sys_i => clk_sys_i);
X
X xwb_crossbar_1: entity work.xwb_crossbar
X generic map (
X g_num_masters => 1,
X g_num_slaves => 1,
X g_registered => false,
X g_address => (0=>x"00000000") ,
X g_mask => (0=>x"00000000"))
X port map (
X clk_sys_i => clk_sys_i,
X rst_n_i => rst_n_i,
X slave_i => wb_m_out,
X slave_o => wb_m_in,
X master_i => wb_s_out,
X master_o => wb_s_in,
X sdb_sel_o => open);
X
end simul;
SHAR_EOF
(set 20 18 11 11 10 51 05 'my-cores/wb_test_top.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test_top.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test_top.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test_top.vhd': 'MD5 check failed'
) << \SHAR_EOF
e58efef2f139c93fbf02ee09dd30c0f9 my-cores/wb_test_top.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'my-cores/wb_test_top.vhd'` -ne 1769 && \
${echo} "restoration warning: size of 'my-cores/wb_test_top.vhd' is not 1769"
fi
fi
# ============= prepare.sh ==============
if test -n "${keep_file}" && test -f 'prepare.sh'
then
${echo} "x - SKIPPING prepare.sh (file already exists)"

else
${echo} "x - extracting prepare.sh (text)"
sed 's/^X//' << 'SHAR_EOF' > 'prepare.sh' &&
#!/bin/bash
set -e
(
X git clone git://ohwr.org/hdl-core-lib/general-cores.git
X cd general-cores
X # I have done simply:
X # git checkout propose_master
X # but as general-cores may further evolve, and get incompatible
X # with my codes, here I get the particular commit:
X git checkout 3bbcf4a385999625bfdeac568410f248b017f57f
)
SHAR_EOF
(set 20 18 11 11 16 59 41 'prepare.sh'

eval "${shar_touch}") && \

chmod 0744 'prepare.sh'

if test $? -ne 0

then ${echo} "restore of prepare.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'prepare.sh': 'MD5 check failed'
) << \SHAR_EOF
4b11986e9e85e8d71bc978710240cb25 prepare.sh
SHAR_EOF

else
test `LC_ALL=C wc -c < 'prepare.sh'` -ne 332 && \
${echo} "restoration warning: size of 'prepare.sh' is not 332"
fi
fi
# ============= Makefile ==============
if test -n "${keep_file}" && test -f 'Makefile'
then
${echo} "x - SKIPPING Makefile (file already exists)"

else
${echo} "x - extracting Makefile (text)"
sed 's/^X//' << 'SHAR_EOF' > 'Makefile' &&
STD=synopsys
VSTD=08
ENTITY=wb_test_top_tb
# --unbuffered option must be added in the new GHDL
RUN_OPTIONS= --unbuffered --stop-time=3900ns --wave=${ENTITY}.ghw

#RUN_OPTIONS= --stop-time=290000ns
#RUN_OPTIONS= --wave=${ENTITY}.ghw
SOURCES = \

X general-cores/modules/genrams/genram_pkg.vhd \
X general-cores/modules/wishbone/wishbone_pkg.vhd \
X general-cores/modules/wishbone/wb_crossbar/xwb_crossbar.vhd \
X my-cores/sim_wb_ctrl.vhd \
X my-cores/wb_test.vhd \
X my-cores/wb_test_top.vhd \
X my-cores/wb_test_top_tb.vhd \

(set 20 18 11 11 17 07 16 'Makefile'

eval "${shar_touch}") && \

chmod 0644 'Makefile'

if test $? -ne 0

then ${echo} "restore of Makefile failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'Makefile': 'MD5 check failed'
) << \SHAR_EOF
549248b4b58ec85691a7fe783c79b391 Makefile
SHAR_EOF

else
test `LC_ALL=C wc -c < 'Makefile'` -ne 1258 && \
${echo} "restoration warning: size of 'Makefile' is not 1258"
fi
fi
# ============= python/cbus.py ==============
if test ! -d 'python'; then
mkdir 'python'

if test $? -eq 0

then ${echo} "x - created directory python."
else ${echo} "x - failed to create directory python."
exit 1
fi
fi
if test -n "${keep_file}" && test -f 'python/cbus.py'
then
${echo} "x - SKIPPING python/cbus.py (file already exists)"

else
${echo} "x - extracting python/cbus.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'python/cbus.py' &&

SHAR_EOF
(set 20 18 11 10 20 51 48 'python/cbus.py'

eval "${shar_touch}") && \

chmod 0744 'python/cbus.py'

if test $? -ne 0

then ${echo} "restore of python/cbus.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'python/cbus.py': 'MD5 check failed'
) << \SHAR_EOF
e93bfcb426768b3638ac962f4fde0f85 python/cbus.py
SHAR_EOF

else
test `LC_ALL=C wc -c < 'python/cbus.py'` -ne 722 && \
${echo} "restoration warning: size of 'python/cbus.py' is not 722"
fi
fi
# ============= python/wb_test.py ==============
if test ! -d 'python'; then
mkdir 'python'

if test $? -eq 0

then ${echo} "x - created directory python."
else ${echo} "x - failed to create directory python."
exit 1
fi
fi
if test -n "${keep_file}" && test -f 'python/wb_test.py'
then
${echo} "x - SKIPPING python/wb_test.py (file already exists)"

else
${echo} "x - extracting python/wb_test.py (text)"
sed 's/^X//' << 'SHAR_EOF' > 'python/wb_test.py' &&
#!/usr/bin/python3
import cbus
cnt=0x40000000
mem=0x0
mem_mod=0x80000000
cbus.bus_delay(100)
print("Test the counter")
cbus.bus_write(cnt,100)
cbus.bus_delay(250)
print("First read:"+hex(cbus.bus_read(cnt)))
cbus.bus_delay(250)
print("2nd read:"+hex(cbus.bus_read(cnt)))
cbus.bus_delay(250)
print("3rd read:"+hex(cbus.bus_read(cnt)))
cbus.bus_delay(250)
print("4th read:"+hex(cbus.bus_read(cnt)))
print("\nTest the memory")
for i in range(0,10):
X cbus.bus_write(mem+i,i*2)
cbus.bus_delay(250)
print("Read from memory:")
for i in range(0,10):
X print("mem["+str(i)+"]="+hex(cbus.bus_read(mem+i)))
print("Read from memory modified by adding 12 and the address:")
for i in range(0,10):
X print("mem_mod["+str(i)+"]="+hex(cbus.bus_read(mem_mod+i)))
cbus.bus_delay(3000)
X
X
SHAR_EOF
(set 20 18 11 11 16 20 35 'python/wb_test.py'

eval "${shar_touch}") && \

chmod 0744 'python/wb_test.py'

if test $? -ne 0

then ${echo} "restore of python/wb_test.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'python/wb_test.py': 'MD5 check failed'
) << \SHAR_EOF
57c17ab6dec942bc8c737ef11e42b5f6 python/wb_test.py
SHAR_EOF

else
test `LC_ALL=C wc -c < 'python/wb_test.py'` -ne 769 && \
${echo} "restoration warning: size of 'python/wb_test.py' is not 769"
fi
fi
# ============= wb_test.sh ==============
if test -n "${keep_file}" && test -f 'wb_test.sh'
then
${echo} "x - SKIPPING wb_test.sh (file already exists)"

else
${echo} "x - extracting wb_test.sh (text)"
sed 's/^X//' << 'SHAR_EOF' > 'wb_test.sh' &&

#!/bin/bash
set -e
rm -f /tmp/rdpipe /tmp/wrpipe
# Create the named pipes
mknod /tmp/rdpipe p
mknod /tmp/wrpipe p
# Run the python script in the other xterm

xterm -e "python python/wb_test.py; echo 'press ENTER'; read" &
make
SHAR_EOF
(set 20 18 11 11 16 56 40 'wb_test.sh'

eval "${shar_touch}") && \

chmod 0744 'wb_test.sh'

if test $? -ne 0

then ${echo} "restore of wb_test.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'wb_test.sh': 'MD5 check failed'
) << \SHAR_EOF
254b4124616f826bdafb6a31085fa253 wb_test.sh
SHAR_EOF

else
test `LC_ALL=C wc -c < 'wb_test.sh'` -ne 226 && \
${echo} "restoration warning: size of 'wb_test.sh' is not 226"
fi
fi
# ============= wb_test_top_tb.sav ==============
if test -n "${keep_file}" && test -f 'wb_test_top_tb.sav'
then
${echo} "x - SKIPPING wb_test_top_tb.sav (file already exists)"

else
${echo} "x - extracting wb_test_top_tb.sav (text)"
sed 's/^X//' << 'SHAR_EOF' > 'wb_test_top_tb.sav' &&
[*]
[*] GTKWave Analyzer v3.3.94 (w)1999-2018 BSI
[*] Sun Nov 11 15:27:26 2018
[*]
[dumpfile] "/tmp/hhh/wb_cosim/wb_test_top_tb.ghw"
[dumpfile_mtime] "Sun Nov 11 15:27:22 2018"
[dumpfile_size] 127806
[savefile] "/tmp/hhh/wb_cosim/wb_test_top_tb.sav"
[timestart] 0
[size] 1280 939
[pos] -1 -1
*-26.695719 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] top.
[treeopen] top.wb_test_top_tb.
[treeopen] top.wb_test_top_tb.dut.
[treeopen] top.wb_test_top_tb.dut.sim_wb_ctrl_1.
[treeopen] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_in.
[treeopen] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.
[treeopen] top.wb_test_top_tb.dut.wb_m_out.[0].
[treeopen] top.wb_test_top_tb.dut.wb_s_in.[0].
[treeopen] top.wb_test_top_tb.dut.wb_test_slvx_1.
[treeopen] top.wb_test_top_tb.dut.wb_test_slvx_1.slv_i.
[treeopen] top.wb_test_top_tb.dut.wb_test_slvx_1.slv_o.
[sst_width] 212
[signals_width] 166
[sst_expanded] 1
[sst_vpaned_height] 270
@28
top.wb_test_top_tb.dut.clk_sys_i
top.wb_test_top_tb.dut.rst_i
@22
#{top.wb_test_top_tb.dut.wb_s_in[0].dat[31:0]} top.wb_test_top_tb.dut.wb_s_in[0].dat[31] top.wb_test_top_tb.dut.wb_s_in[0].dat[30] top.wb_test_top_tb.dut.wb_s_in[0].dat[29] top.wb_test_top_tb.dut.wb_s_in[0].dat[28] top.wb_test_top_tb.dut.wb_s_in[0].dat[27] top.wb_test_top_tb.dut.wb_s_in[0].dat[26] top.wb_test_top_tb.dut.wb_s_in[0].dat[25] top.wb_test_top_tb.dut.wb_s_in[0].dat[24] top.wb_test_top_tb.dut.wb_s_in[0].dat[23] top.wb_test_top_tb.dut.wb_s_in[0].dat[22] top.wb_test_top_tb.dut.wb_s_in[0].dat[21] top.wb_test_top_tb.dut.wb_s_in[0].dat[20] top.wb_test_top_tb.dut.wb_s_in[0].dat[19] top.wb_test_top_tb.dut.wb_s_in[0].dat[18] top.wb_test_top_tb.dut.wb_s_in[0].dat[17] top.wb_test_top_tb.dut.wb_s_in[0].dat[16] top.wb_test_top_tb.dut.wb_s_in[0].dat[15] top.wb_test_top_tb.dut.wb_s_in[0].dat[14] top.wb_test_top_tb.dut.wb_s_in[0].dat[13] top.wb_test_top_tb.dut.wb_s_in[0].dat[12] top.wb_test_top_tb.dut.wb_s_in[0].dat[11] top.wb_test_top_tb.dut.wb_s_in[0].dat[10] top.wb_test_top_tb.dut.wb_s_in[0].dat[9] top.wb_test_top_tb.dut.wb_s_in[0].dat[8] top.wb_test_top_tb.dut.wb_s_in[0].dat[7] top.wb_test_top_tb.dut.wb_s_in[0].dat[6] top.wb_test_top_tb.dut.wb_s_in[0].dat[5] top.wb_test_top_tb.dut.wb_s_in[0].dat[4] top.wb_test_top_tb.dut.wb_s_in[0].dat[3] top.wb_test_top_tb.dut.wb_s_in[0].dat[2] top.wb_test_top_tb.dut.wb_s_in[0].dat[1] top.wb_test_top_tb.dut.wb_s_in[0].dat[0]
#{top.wb_test_top_tb.dut.wb_s_in[0].sel[3:0]} top.wb_test_top_tb.dut.wb_s_in[0].sel[3] top.wb_test_top_tb.dut.wb_s_in[0].sel[2] top.wb_test_top_tb.dut.wb_s_in[0].sel[1] top.wb_test_top_tb.dut.wb_s_in[0].sel[0]
#{top.wb_test_top_tb.dut.wb_s_in[0].adr[31:0]} top.wb_test_top_tb.dut.wb_s_in[0].adr[31] top.wb_test_top_tb.dut.wb_s_in[0].adr[30] top.wb_test_top_tb.dut.wb_s_in[0].adr[29] top.wb_test_top_tb.dut.wb_s_in[0].adr[28] top.wb_test_top_tb.dut.wb_s_in[0].adr[27] top.wb_test_top_tb.dut.wb_s_in[0].adr[26] top.wb_test_top_tb.dut.wb_s_in[0].adr[25] top.wb_test_top_tb.dut.wb_s_in[0].adr[24] top.wb_test_top_tb.dut.wb_s_in[0].adr[23] top.wb_test_top_tb.dut.wb_s_in[0].adr[22] top.wb_test_top_tb.dut.wb_s_in[0].adr[21] top.wb_test_top_tb.dut.wb_s_in[0].adr[20] top.wb_test_top_tb.dut.wb_s_in[0].adr[19] top.wb_test_top_tb.dut.wb_s_in[0].adr[18] top.wb_test_top_tb.dut.wb_s_in[0].adr[17] top.wb_test_top_tb.dut.wb_s_in[0].adr[16] top.wb_test_top_tb.dut.wb_s_in[0].adr[15] top.wb_test_top_tb.dut.wb_s_in[0].adr[14] top.wb_test_top_tb.dut.wb_s_in[0].adr[13] top.wb_test_top_tb.dut.wb_s_in[0].adr[12] top.wb_test_top_tb.dut.wb_s_in[0].adr[11] top.wb_test_top_tb.dut.wb_s_in[0].adr[10] top.wb_test_top_tb.dut.wb_s_in[0].adr[9] top.wb_test_top_tb.dut.wb_s_in[0].adr[8] top.wb_test_top_tb.dut.wb_s_in[0].adr[7] top.wb_test_top_tb.dut.wb_s_in[0].adr[6] top.wb_test_top_tb.dut.wb_s_in[0].adr[5] top.wb_test_top_tb.dut.wb_s_in[0].adr[4] top.wb_test_top_tb.dut.wb_s_in[0].adr[3] top.wb_test_top_tb.dut.wb_s_in[0].adr[2] top.wb_test_top_tb.dut.wb_s_in[0].adr[1] top.wb_test_top_tb.dut.wb_s_in[0].adr[0]
#{top.wb_test_top_tb.dut.wb_m_out[0].dat[31:0]} top.wb_test_top_tb.dut.wb_m_out[0].dat[31] top.wb_test_top_tb.dut.wb_m_out[0].dat[30] top.wb_test_top_tb.dut.wb_m_out[0].dat[29] top.wb_test_top_tb.dut.wb_m_out[0].dat[28] top.wb_test_top_tb.dut.wb_m_out[0].dat[27] top.wb_test_top_tb.dut.wb_m_out[0].dat[26] top.wb_test_top_tb.dut.wb_m_out[0].dat[25] top.wb_test_top_tb.dut.wb_m_out[0].dat[24] top.wb_test_top_tb.dut.wb_m_out[0].dat[23] top.wb_test_top_tb.dut.wb_m_out[0].dat[22] top.wb_test_top_tb.dut.wb_m_out[0].dat[21] top.wb_test_top_tb.dut.wb_m_out[0].dat[20] top.wb_test_top_tb.dut.wb_m_out[0].dat[19] top.wb_test_top_tb.dut.wb_m_out[0].dat[18] top.wb_test_top_tb.dut.wb_m_out[0].dat[17] top.wb_test_top_tb.dut.wb_m_out[0].dat[16] top.wb_test_top_tb.dut.wb_m_out[0].dat[15] top.wb_test_top_tb.dut.wb_m_out[0].dat[14] top.wb_test_top_tb.dut.wb_m_out[0].dat[13] top.wb_test_top_tb.dut.wb_m_out[0].dat[12] top.wb_test_top_tb.dut.wb_m_out[0].dat[11] top.wb_test_top_tb.dut.wb_m_out[0].dat[10] top.wb_test_top_tb.dut.wb_m_out[0].dat[9] top.wb_test_top_tb.dut.wb_m_out[0].dat[8] top.wb_test_top_tb.dut.wb_m_out[0].dat[7] top.wb_test_top_tb.dut.wb_m_out[0].dat[6] top.wb_test_top_tb.dut.wb_m_out[0].dat[5] top.wb_test_top_tb.dut.wb_m_out[0].dat[4] top.wb_test_top_tb.dut.wb_m_out[0].dat[3] top.wb_test_top_tb.dut.wb_m_out[0].dat[2] top.wb_test_top_tb.dut.wb_m_out[0].dat[1] top.wb_test_top_tb.dut.wb_m_out[0].dat[0]
#{top.wb_test_top_tb.dut.wb_m_out[0].sel[3:0]} top.wb_test_top_tb.dut.wb_m_out[0].sel[3] top.wb_test_top_tb.dut.wb_m_out[0].sel[2] top.wb_test_top_tb.dut.wb_m_out[0].sel[1] top.wb_test_top_tb.dut.wb_m_out[0].sel[0]
#{top.wb_test_top_tb.dut.wb_m_out[0].adr[31:0]} top.wb_test_top_tb.dut.wb_m_out[0].adr[31] top.wb_test_top_tb.dut.wb_m_out[0].adr[30] top.wb_test_top_tb.dut.wb_m_out[0].adr[29] top.wb_test_top_tb.dut.wb_m_out[0].adr[28] top.wb_test_top_tb.dut.wb_m_out[0].adr[27] top.wb_test_top_tb.dut.wb_m_out[0].adr[26] top.wb_test_top_tb.dut.wb_m_out[0].adr[25] top.wb_test_top_tb.dut.wb_m_out[0].adr[24] top.wb_test_top_tb.dut.wb_m_out[0].adr[23] top.wb_test_top_tb.dut.wb_m_out[0].adr[22] top.wb_test_top_tb.dut.wb_m_out[0].adr[21] top.wb_test_top_tb.dut.wb_m_out[0].adr[20] top.wb_test_top_tb.dut.wb_m_out[0].adr[19] top.wb_test_top_tb.dut.wb_m_out[0].adr[18] top.wb_test_top_tb.dut.wb_m_out[0].adr[17] top.wb_test_top_tb.dut.wb_m_out[0].adr[16] top.wb_test_top_tb.dut.wb_m_out[0].adr[15] top.wb_test_top_tb.dut.wb_m_out[0].adr[14] top.wb_test_top_tb.dut.wb_m_out[0].adr[13] top.wb_test_top_tb.dut.wb_m_out[0].adr[12] top.wb_test_top_tb.dut.wb_m_out[0].adr[11] top.wb_test_top_tb.dut.wb_m_out[0].adr[10] top.wb_test_top_tb.dut.wb_m_out[0].adr[9] top.wb_test_top_tb.dut.wb_m_out[0].adr[8] top.wb_test_top_tb.dut.wb_m_out[0].adr[7] top.wb_test_top_tb.dut.wb_m_out[0].adr[6] top.wb_test_top_tb.dut.wb_m_out[0].adr[5] top.wb_test_top_tb.dut.wb_m_out[0].adr[4] top.wb_test_top_tb.dut.wb_m_out[0].adr[3] top.wb_test_top_tb.dut.wb_m_out[0].adr[2] top.wb_test_top_tb.dut.wb_m_out[0].adr[1] top.wb_test_top_tb.dut.wb_m_out[0].adr[0]
#{top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[31:0]} top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[31] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[30] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[29] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[28] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[27] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[26] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[25] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[24] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[23] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[22] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[21] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[20] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[19] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[18] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[17] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[16] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[15] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[14] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[13] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[12] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[11] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[10] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[9] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[8] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[7] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[6] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[5] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[4] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[3] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[2] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[1] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.adr[0]
#{top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.sel[3:0]} top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.sel[3] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.sel[2] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.sel[1] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.sel[0]
#{top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[31:0]} top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[31] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[30] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[29] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[28] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[27] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[26] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[25] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[24] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[23] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[22] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[21] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[20] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[19] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[18] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[17] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[16] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[15] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[14] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[13] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[12] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[11] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[10] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[9] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[8] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[7] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[6] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[5] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[4] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[3] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[2] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[1] top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.dat[0]
@28
top.wb_test_top_tb.dut.sim_wb_ctrl_1.clk_sys_i
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_in.stall
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_in.rty
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_in.err
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_in.ack
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.we
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.stb
top.wb_test_top_tb.dut.sim_wb_ctrl_1.wb_m_out.cyc
@22
#{top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[31:0]} top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[31] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[30] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[29] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[28] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[27] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[26] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[25] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[24] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[23] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[22] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[21] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[20] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[19] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[18] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[17] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[16] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[15] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[14] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[13] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[12] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[11] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[10] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[9] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[8] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[7] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[6] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[5] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[4] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[3] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[2] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[1] top.wb_test_top_tb.dut.wb_test_slvx_1.tst_counter[0]
@28
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_o.stall
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_o.rty
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_o.err
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_o.ack
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_i.we
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_i.stb
top.wb_test_top_tb.dut.wb_test_slvx_1.slv_i.cyc
top.wb_test_top_tb.dut.wb_test_slvx_1.rst_i
top.wb_test_top_tb.dut.wb_test_slvx_1.sys_clk_i

[pattern_trace] 1
[pattern_trace] 0
SHAR_EOF

(set 20 18 11 11 16 27 26 'wb_test_top_tb.sav'

eval "${shar_touch}") && \

chmod 0644 'wb_test_top_tb.sav'

if test $? -ne 0

then ${echo} "restore of wb_test_top_tb.sav failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'wb_test_top_tb.sav': 'MD5 check failed'
) << \SHAR_EOF
544de6d6130cd2d57fa443acfddd9190 wb_test_top_tb.sav
SHAR_EOF

else
test `LC_ALL=C wc -c < 'wb_test_top_tb.sav'` -ne 13522 && \
${echo} "restoration warning: size of 'wb_test_top_tb.sav' is not 13522"

Wojciech M. Zabołotny

unread,

Nov 11, 2018, 6:34:36 PM11/11/18

Archive-name: wishbone-cbus
Version: 1.2

Submitted-by: wz...@ise.pw.edu.pl (Wojciech M. Zabolotny)

script.

It will open new xterm window with Python application wb_test.py,
and then run the "make" command that will compile sources
and start simulation in GHDL. (Make sure, that GHDL is available
in PATH)

All my files in this archive are published as PUBLIC DOMAIN.

(The files downloaded to the general-cores directory have
their own licenses defined inside).

The maintained version of this code is kept in my repository:
https://github.com/wzab/wzab-hdl-library/tree/master/cosimulation/wb_cosim

Good luck!
Wojtek

#!/bin/sh
# This is a shell archive (produced by GNU sharutils 4.15.2).

# To extract the files from this archive, save it to some FILE, remove
# everything before the '#!/bin/sh' line above, then type 'sh FILE'.
#

lock_dir=_sh27250
# Made on 2018-11-12 00:31 CET by <wzab@wzab>.
# Source directory was '/tmp/wb_cosim'.

#
# Existing files will *not* be overwritten, unless '-c' is specified.
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------

# 3136 -rw-r--r-- my-cores/wb_test.vhd
# 2288 -rw-r--r-- my-cores/wb_test_top_tb.vhd

# 9348 -rw-r--r-- my-cores/sim_wb_ctrl.vhd

# 1769 -rw-r--r-- my-cores/wb_test_top.vhd
# 332 -rwxr--r-- prepare.sh
# 1258 -rw-r--r-- Makefile
# 722 -rwxr--r-- python/cbus.py
# 769 -rwxr--r-- python/wb_test.py
# 226 -rwxr--r-- wb_test.sh
# 13522 -rw-r--r-- wb_test_top_tb.sav

# ============= my-cores/wb_test.vhd ==============
if test ! -d 'my-cores'; then
mkdir 'my-cores'

if test $? -eq 0

${echo} "x - extracting my-cores/wb_test.vhd (text)"
sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test.vhd' &&
-------------------------------------------------------------------------------
-- Title : WB test slave

-- Project :
-------------------------------------------------------------------------------

-- File : wb_test.vhd
-- Author : FPGA Developer <x...@wzab.nasz.dom>
-- Company :
-- Created : 2018-04-16
-- Last update: 2018-11-11

-- Platform :
-- Standard : VHDL'93/02
-------------------------------------------------------------------------------

-- Description: It just allows you to check in simulation if the access is correct
-------------------------------------------------------------------------------
-- Copyright (c) 2018

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2018-07-26 1.0 xl Created
-------------------------------------------------------------------------------
X
X

X
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

X signal tst_counter : unsigned(31 downto 0) := (others => '0');
X

begin
X -- At the moment we do not generate errors nor stalls
X slv_o.rty <= '0';
X slv_o.err <= '0';
X slv_o.stall <= '0';
X
X process (sys_clk_i) is
X variable v_read : std_logic_vector(31 downto 0);
X begin -- process
X if sys_clk_i'event and sys_clk_i = '1' then -- rising clock edge
X if rst_i = '1' then -- synchronous reset (active high)
X v_read := (others => '0');
X slv_o.ack <= '0';
X slv_o.dat <= (others => '0');
X tst_counter <= (others => '0');
X else
X v_read := (others => '0');
X -- Decrement test counter
X if to_integer(tst_counter) /= 0 then

X tst_counter <= tst_counter - 1;
X end if;

X if(slv_i.stb = '1') then
X slv_o.ack <= '1';
X if slv_i.we = '1' then
X -- Write access
X if slv_i.adr(30) = '0' then
X -- simple memory
X mem(to_integer(unsigned(slv_i.adr(9 downto 0)))) <= slv_i.dat;
X else
X -- counter
X tst_counter <= unsigned(slv_i.dat);

X end if;
X else

X v_read := std_logic_vector(tst_counter);
X end if;

X end if;
X else
X slv_o.ack <= '0';

X end if;

X end if;
X slv_o.dat <= v_read;

X end if;

X end process;
X
end architecture rtl;
X
SHAR_EOF
(set 20 18 11 11 16 05 37 'my-cores/wb_test.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test.vhd': 'MD5 check failed'
) << \SHAR_EOF
439b701498f98098561cc7fba42f71a9 my-cores/wb_test.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'my-cores/wb_test.vhd'` -ne 3136 && \
${echo} "restoration warning: size of 'my-cores/wb_test.vhd' is not 3136"
fi
fi

# ============= my-cores/wb_test_top_tb.vhd ==============
if test ! -d 'my-cores'; then
mkdir 'my-cores'

if test $? -eq 0

${echo} "x - extracting my-cores/wb_test_top_tb.vhd (text)"

sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test_top_tb.vhd' &&
-------------------------------------------------------------------------------
-- Title : Testbench for design "wb_test_top"
-- Project :
-------------------------------------------------------------------------------

-- File : wb_test_top_tb.vhd
-- Author : Wojciech Zabołotny <wz...@wzab.nasz.dom>
-- Company :
-- Created : 2018-11-11
-- Last update: 2018-11-11

-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description

-- 2018-11-11 1.0 wzab Created

entity wb_test_top_tb is
X
end entity wb_test_top_tb;
X
-------------------------------------------------------------------------------
X

architecture test of wb_test_top_tb is

X
X -- component generics
X constant rdpipename : string := "/tmp/rdpipe";
X constant wrpipename : string := "/tmp/wrpipe";
X
X -- component ports

X signal rst_i : std_logic := '1';
X signal clk_sys_i : std_logic;

X
X -- clock
X signal Clk : std_logic := '1';
X

begin -- architecture test
X
X clk_sys_i <= clk;

X -- component instantiation
X DUT: entity work.wb_test_top

X generic map (
X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X rst_i => rst_i,
X clk_sys_i => clk_sys_i);

X
X -- clock generation

X Clk <= not Clk after 10 ns;
X

X -- waveform generation
X WaveGen_Proc: process
X begin
X -- insert signal assignments here

X rst_i <= '1';

X wait until Clk = '1';

X wait for 5 ns;
X rst_i <= '0';

X wait;
X end process WaveGen_Proc;
X
X
X

X
-------------------------------------------------------------------------------
SHAR_EOF

(set 20 18 11 11 11 05 50 'my-cores/wb_test_top_tb.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test_top_tb.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test_top_tb.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test_top_tb.vhd': 'MD5 check failed'
) << \SHAR_EOF
77c23ccb1ca2a77b79d01808838f2e8d my-cores/wb_test_top_tb.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'my-cores/wb_test_top_tb.vhd'` -ne 2288 && \
${echo} "restoration warning: size of 'my-cores/wb_test_top_tb.vhd' is not 2288"
fi
fi

# ============= my-cores/sim_wb_ctrl.vhd ==============
if test -n "${keep_file}" && test -f 'my-cores/sim_wb_ctrl.vhd'
then
${echo} "x - SKIPPING my-cores/sim_wb_ctrl.vhd (file already exists)"

else

${echo} "x - extracting my-cores/sim_wb_ctrl.vhd (text)"

sed 's/^X//' << 'SHAR_EOF' > 'my-cores/sim_wb_ctrl.vhd' &&

use work.wishbone_pkg.all;
library work;
X

entity sim_wb_ctrl is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X wb_m_out : out t_wishbone_master_out;
X wb_m_in : in t_wishbone_master_in;

X clk_sys_i : in std_logic
X );
X
end sim_wb_ctrl;
X
architecture simul of sim_wb_ctrl is

X if pos = 0 then

X write(res, hexdigs(nibble));
X nibble := 1;
X end if;
X end loop; -- i
X else
X for i in vec'right downto vec'left loop
X pos := i mod 4;
X if vec(i) = '1' then
X nibble := nibble + 2**(pos);
X end if;

X if pos = 0 then

X write(res, hexdigs(nibble));
X nibble := 1;
X end if;
X end loop; -- i
X end if;
X end write_stlv_hex;
X
X procedure bus_read (
X variable address : in std_logic_vector((addrwidth-1) downto 0);
X variable data : out std_logic_vector((datawidth-1) downto 0);
X variable status : out boolean
X ) is
X begin -- ipbus_read
X if sync_with_slope = false then

X wait until rising_edge(clk_sys_i);

X sync_with_slope := true;
X end if;

X wb_m_out.adr <= address;
X wb_m_out.we <= '0';
X wb_m_out.stb <= '1';

X wb_m_out.cyc <= '1';
X lr1 : loop
X wait until rising_edge(clk_sys_i);
X if wb_m_in.ack = '1' then
X data := wb_m_in.dat;

X status := true;
X exit lr1;
X end if;

X if wb_m_in.err = '1' then

X data := (others => '0');
X status := false;
X exit lr1;
X end if;
X end loop;

X wb_m_out.stb <= '0';
X wb_m_out.cyc <= '0';

X lr2 : loop
X wait until rising_edge(clk_sys_i);
X if (wb_m_in.ack = '0') and
X (wb_m_in.err = '0')and
X (wb_m_in.rty = '0')
X then
X exit lr2;

X end if;
X end loop;

X wait until rising_edge(clk_sys_i);

X sync_with_slope := true;
X end if;

X wb_m_out.adr <= address;
X wb_m_out.dat <= data;
X wb_m_out.we <= '1';
X wb_m_out.stb <= '1';

X wb_m_out.cyc <= '1';
X lw1 : loop
X wait until rising_edge(clk_sys_i);
X if wb_m_in.ack = '1' then

X status := true;
X exit lw1;
X end if;

X if wb_m_in.err = '1' then

X status := false;
X exit lw1;
X end if;
X end loop;

X wb_m_out.stb <= '0';
X wb_m_out.cyc <= '0';
X wb_m_out.we <= '0';

X lw2 : loop
X wait until rising_edge(clk_sys_i);
X if (wb_m_in.ack = '0') and
X (wb_m_in.err = '0')and
X (wb_m_in.rty = '0')
X then
X exit lw2;

X end if;
X end loop;

X wb_m_out <= c_DUMMY_WB_MASTER_OUT;

X write(wr_line, string'("ACK"));
X else
X write(wr_line, string'("ERR"));

X end if;
X writeline(read_pipe, wr_line);

X -- If you are using VHDL-2008, you may uncomment
X -- the flush command below, and run GHDL without
X -- "--unbuffered" option
X --flush(read_pipe);

X when 'R' =>
X read_hex_stlv(rd_line, addrwidth, address);
X bus_read(address, data, status);
X if status then
X write_stlv_hex(wr_line, data);
X else

X write(wr_line, string'("ERR"));

X end if;
X writeline(read_pipe, wr_line);

X -- If you are using VHDL-2008, you may uncomment
X -- the flush command below, and run GHDL without
X -- "--unbuffered" option
X --flush(read_pipe);

X when 'T' =>
X read_hex_stlv(rd_line, 32, data);
X delay := to_integer(unsigned(data));
X wait for delay * 1 ns;
X sync_with_slope := false;
X when others =>
X assert(false)
X report "Error: wrong character at the begining of the line" severity error;
X end case;
X end loop;
X wait;
X end process;
X
X
end simul;
SHAR_EOF

(set 20 18 11 11 23 16 27 'my-cores/sim_wb_ctrl.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/sim_wb_ctrl.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/sim_wb_ctrl.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/sim_wb_ctrl.vhd': 'MD5 check failed'
) << \SHAR_EOF
286b0f1523955b40b4752d93acf7cbce my-cores/sim_wb_ctrl.vhd
SHAR_EOF

else
test `LC_ALL=C wc -c < 'my-cores/sim_wb_ctrl.vhd'` -ne 9348 && \
${echo} "restoration warning: size of 'my-cores/sim_wb_ctrl.vhd' is not 9348"
fi
fi
# ============= my-cores/wb_test_top.vhd ==============
if test -n "${keep_file}" && test -f 'my-cores/wb_test_top.vhd'
then
${echo} "x - SKIPPING my-cores/wb_test_top.vhd (file already exists)"

else

${echo} "x - extracting my-cores/wb_test_top.vhd (text)"

sed 's/^X//' << 'SHAR_EOF' > 'my-cores/wb_test_top.vhd' &&

use work.wishbone_pkg.all;
library work;
X

entity wb_test_top is

X
X generic (
X rdpipename : string := "rdpipe";
X wrpipename : string := "wrpipe"
X );
X
X port (

X rst_i : in std_logic;
X clk_sys_i : in std_logic
X );
X
end wb_test_top;
X
architecture simul of wb_test_top is

X
X constant addrwidth, datawidth : integer := 32;
X

X
begin -- simul
X

X rst_n_i <= not rst_i;
X wb_test_slvx_1: entity work.wb_test_slvx

X port map (

X sys_clk_i => clk_sys_i,
X rst_i => rst_i,
X slv_i => wb_s_in(0),
X slv_o => wb_s_out(0));
X
X sim_wb_ctrl_1: entity work.sim_wb_ctrl

X generic map (
X rdpipename => rdpipename,
X wrpipename => wrpipename)
X port map (

X wb_m_out => wb_m_out(0),
X wb_m_in => wb_m_in(0),
X clk_sys_i => clk_sys_i);
X
X xwb_crossbar_1: entity work.xwb_crossbar

X generic map (

X g_num_masters => 1,
X g_num_slaves => 1,
X g_registered => false,
X g_address => (0=>x"00000000") ,
X g_mask => (0=>x"00000000"))

X port map (

X clk_sys_i => clk_sys_i,
X rst_n_i => rst_n_i,
X slave_i => wb_m_out,
X slave_o => wb_m_in,
X master_i => wb_s_out,
X master_o => wb_s_in,
X sdb_sel_o => open);

X
end simul;
SHAR_EOF

(set 20 18 11 11 10 51 05 'my-cores/wb_test_top.vhd'

eval "${shar_touch}") && \

chmod 0644 'my-cores/wb_test_top.vhd'

if test $? -ne 0

then ${echo} "restore of my-cores/wb_test_top.vhd failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'my-cores/wb_test_top.vhd': 'MD5 check failed'
) << \SHAR_EOF
e58efef2f139c93fbf02ee09dd30c0f9 my-cores/wb_test_top.vhd
SHAR_EOF

else

test `LC_ALL=C wc -c < 'my-cores/wb_test_top.vhd'` -ne 1769 && \
${echo} "restoration warning: size of 'my-cores/wb_test_top.vhd' is not 1769"
fi
fi

# ============= prepare.sh ==============
if test -n "${keep_file}" && test -f 'prepare.sh'
then
${echo} "x - SKIPPING prepare.sh (file already exists)"

else

${echo} "x - extracting prepare.sh (text)"
sed 's/^X//' << 'SHAR_EOF' > 'prepare.sh' &&
#!/bin/bash
set -e
(
X git clone git://ohwr.org/hdl-core-lib/general-cores.git
X cd general-cores
X # I have done simply:
X # git checkout propose_master
X # but as general-cores may further evolve, and get incompatible
X # with my codes, here I get the particular commit:
X git checkout 3bbcf4a385999625bfdeac568410f248b017f57f
)
SHAR_EOF
(set 20 18 11 11 16 59 41 'prepare.sh'

eval "${shar_touch}") && \

chmod 0744 'prepare.sh'

if test $? -ne 0

then ${echo} "restore of prepare.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'prepare.sh': 'MD5 check failed'
) << \SHAR_EOF
4b11986e9e85e8d71bc978710240cb25 prepare.sh
SHAR_EOF

else

test `LC_ALL=C wc -c < 'prepare.sh'` -ne 332 && \
${echo} "restoration warning: size of 'prepare.sh' is not 332"
fi
fi

# ============= Makefile ==============
if test -n "${keep_file}" && test -f 'Makefile'
then
${echo} "x - SKIPPING Makefile (file already exists)"

else

${echo} "x - extracting Makefile (text)"
sed 's/^X//' << 'SHAR_EOF' > 'Makefile' &&
STD=synopsys
VSTD=08
ENTITY=wb_test_top_tb
# --unbuffered option must be added in the new GHDL

RUN_OPTIONS= --unbuffered --stop-time=3900ns --wave=${ENTITY}.ghw

#RUN_OPTIONS= --stop-time=290000ns
#RUN_OPTIONS= --wave=${ENTITY}.ghw
SOURCES = \

(set 20 18 11 11 17 07 16 'Makefile'

eval "${shar_touch}") && \

chmod 0644 'Makefile'

if test $? -ne 0

then ${echo} "restore of Makefile failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'Makefile': 'MD5 check failed'
) << \SHAR_EOF
549248b4b58ec85691a7fe783c79b391 Makefile
SHAR_EOF

else

test `LC_ALL=C wc -c < 'Makefile'` -ne 1258 && \
${echo} "restoration warning: size of 'Makefile' is not 1258"
fi
fi

# ============= python/cbus.py ==============
if test ! -d 'python'; then
mkdir 'python'

if test $? -eq 0

${echo} "x - extracting python/cbus.py (text)"

sed 's/^X//' << 'SHAR_EOF' > 'python/cbus.py' &&

SHAR_EOF
(set 20 18 11 10 20 51 48 'python/cbus.py'

eval "${shar_touch}") && \

chmod 0744 'python/cbus.py'

if test $? -ne 0

then ${echo} "restore of python/cbus.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'python/cbus.py': 'MD5 check failed'
) << \SHAR_EOF
e93bfcb426768b3638ac962f4fde0f85 python/cbus.py
SHAR_EOF

else

test `LC_ALL=C wc -c < 'python/cbus.py'` -ne 722 && \
${echo} "restoration warning: size of 'python/cbus.py' is not 722"
fi
fi

# ============= python/wb_test.py ==============
if test ! -d 'python'; then
mkdir 'python'

if test $? -eq 0

X
X
SHAR_EOF

(set 20 18 11 11 16 20 35 'python/wb_test.py'

eval "${shar_touch}") && \

chmod 0744 'python/wb_test.py'

if test $? -ne 0

then ${echo} "restore of python/wb_test.py failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'python/wb_test.py': 'MD5 check failed'
) << \SHAR_EOF
57c17ab6dec942bc8c737ef11e42b5f6 python/wb_test.py
SHAR_EOF

else

test `LC_ALL=C wc -c < 'python/wb_test.py'` -ne 769 && \
${echo} "restoration warning: size of 'python/wb_test.py' is not 769"
fi
fi

# ============= wb_test.sh ==============
if test -n "${keep_file}" && test -f 'wb_test.sh'
then
${echo} "x - SKIPPING wb_test.sh (file already exists)"

else

${echo} "x - extracting wb_test.sh (text)"

sed 's/^X//' << 'SHAR_EOF' > 'wb_test.sh' &&

#!/bin/bash
set -e
rm -f /tmp/rdpipe /tmp/wrpipe
# Create the named pipes
mknod /tmp/rdpipe p
mknod /tmp/wrpipe p
# Run the python script in the other xterm

xterm -e "python python/wb_test.py; echo 'press ENTER'; read" &
make
SHAR_EOF
(set 20 18 11 11 16 56 40 'wb_test.sh'

eval "${shar_touch}") && \

chmod 0744 'wb_test.sh'

if test $? -ne 0

then ${echo} "restore of wb_test.sh failed"

fi
if ${md5check}
then (

${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'wb_test.sh': 'MD5 check failed'
) << \SHAR_EOF
254b4124616f826bdafb6a31085fa253 wb_test.sh
SHAR_EOF

else

test `LC_ALL=C wc -c < 'wb_test.sh'` -ne 226 && \
${echo} "restoration warning: size of 'wb_test.sh' is not 226"
fi
fi

# ============= wb_test_top_tb.sav ==============
if test -n "${keep_file}" && test -f 'wb_test_top_tb.sav'
then
${echo} "x - SKIPPING wb_test_top_tb.sav (file already exists)"

else

${echo} "x - extracting wb_test_top_tb.sav (text)"

sed 's/^X//' << 'SHAR_EOF' > 'wb_test_top_tb.sav' &&
[*]

[pattern_trace] 1
[pattern_trace] 0
SHAR_EOF

(set 20 18 11 11 16 27 26 'wb_test_top_tb.sav'

eval "${shar_touch}") && \

chmod 0644 'wb_test_top_tb.sav'

if test $? -ne 0

then ${echo} "restore of wb_test_top_tb.sav failed"

fi
if ${md5check}
then (

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