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A Complete History Of Mainframe Computing

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Anne & Lynn Wheeler

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May 3, 2013, 7:51:02 PM5/3/13
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reposted from ibm-main h/t phsiii

A Complete History Of Mainframe Computing
http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html

--
virtualization experience starting Jan1968, online at home since Mar1970

Bill Findlay

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May 3, 2013, 8:28:14 PM5/3/13
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On 04/05/2013 00:51, in article m3haijb...@garlic.com, "Anne & Lynn
Wheeler" <ly...@garlic.com> wrote:

>
> reposted from ibm-main h/t phsiii
>
> A Complete History Of Mainframe Computing
> http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html

Not.

--
Bill Findlay
with blueyonder.co.uk;
use surname & forename;


Quadibloc

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May 3, 2013, 10:04:06 PM5/3/13
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On May 3, 6:28 pm, Bill Findlay <yaldni...@blueyonder.co.uk> wrote:
> On 04/05/2013 00:51, in article m3haijbp21....@garlic.com, "Anne & Lynn
> Wheeler" <l...@garlic.com> wrote:

> > A Complete History Of Mainframe Computing

> Not.

Yes, the title is of necessity pretentious. But it's a good outline.
Unfortunately, though, on many of the pages, an advertisement which it
is impossible to close covers up half the text.

John Savard

Quadibloc

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May 3, 2013, 10:06:25 PM5/3/13
to
Caught a howler! The article on the Burroughs B 5000 is illustrated by
a picture of the BRLESC.

John Savard

Bill Leary

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May 4, 2013, 12:23:41 AM5/4/13
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"Anne & Lynn Wheeler" wrote in message news:m3haijb...@garlic.com...
> reposted from ibm-main h/t phsiii
>
> A Complete History Of Mainframe Computing
> http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html

Interesting article. Nice to see some of my favorite, obscure, machines,
like the ABC and the B5000, mentioned.

A few bits could stand better proof reading. For example, on the ENIAC
page; "... consisted of 49-ft. high cabinets, ... ." My recollection was
that the tallest cabinets were something like eight to ten feet tall with a
number of others around six feet. Numerous other glitches like that
throughout the series. A few instances of opinion-as-fact as well and a few
lame jokes here and there.

Worth a read anyway.

Thanks for the pointer.

- Bill

Bob Martin

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May 4, 2013, 12:46:37 AM5/4/13
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in 596609 20130504 005102 Anne & Lynn Wheeler <ly...@garlic.com> wrote:
>reposted from ibm-main h/t phsiii
>
>A Complete History Of Mainframe Computing
>http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html
>

Subject should be "A Complete History of Mainframe Computing in the USA"

Quadibloc

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May 4, 2013, 8:48:11 AM5/4/13
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On May 3, 11:46 pm, Bob Martin <bob.mar...@excite.com> wrote:

> Subject should be "A Complete History of Mainframe Computing in the USA"

It's true enough that such machines as the Atlas, the ICL 1900, the
DEUCE, the Leo III, the Regencentralen GIER, and even the BESM-6 are
conspicuous by their absence, while IBM's later models are somewhat
over-represented...

Interestingly enough, the Control Data 6600 was included, but the Cray-
I was omitted... and neither Amdahl nor any of the other plug-
compatibles was noted.

John Savard

Anne & Lynn Wheeler

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May 4, 2013, 10:06:00 AM5/4/13
to
Quadibloc <jsa...@ecn.ab.ca> writes:
> It's true enough that such machines as the Atlas, the ICL 1900, the
> DEUCE, the Leo III, the Regencentralen GIER, and even the BESM-6 are
> conspicuous by their absence, while IBM's later models are somewhat
> over-represented...
>
> Interestingly enough, the Control Data 6600 was included, but the Cray-
> I was omitted... and neither Amdahl nor any of the other plug-
> compatibles was noted.

re:
http://www.garlic.com/~lynn/2013f.html#82 A Complete History Of Mainframe Computing

one might claim that amdahl's clone was more "IBM 360" than the 3081

Amdahl wanting to do ACS-360
http://people.cs.clemson.edu/~mark/acs_end.html

but canceled because it would have advanced computing too fast,
endangering IBM's control of the market.

Amdahl leaves and IBM launches into FS ... which was going to be
completely replace 360 and be completely different. Amdahl does a 360,
but at his own company ... the lack of IBM 360 products during the FS
period is credited with giving the "clones" market foothold.
http://www.cs.clemson.edu/~mark/fs.html
http://en.wikipedia.org/wiki/IBM_Future_Systems_project
http://gdrean.perso.sfr.fr/papers/promises.html

past posts
http://www.garlic.com/~lynn/submain.html#futuresys

After billions of (early 70) dollars, Future System implodes w/o being
announced ... and then there is mad rush to get products back into the
360/370 product pipelines.
http://www.jfsowa.com/computer/memo125.htm

3033 starts out being 168 remapped to some left-over FS 20% faster chip
technology ... followed by 3081 that is still more left-over FS
technology ... from above:

The 370 emulator minus the FS microcode was eventually sold in 1980 as
as the IBM 3081. The ratio of the amount of circuitry in the 3081 to its
performance was significantly worse than other IBM systems of the time;
its price/performance ratio wasn't quite so bad because IBM had to cut
the price to be competitive. The major competition at the time was from
Amdahl Systems -- a company founded by Gene Amdahl, who left IBM
shortly before the FS project began, when his plans for the Advanced
Computer System (ACS) were killed. The Amdahl machine was indeed
superior to the 3081 in price/performance and spectaculary superior in
terms of performance compared to the amount of circuitry.]

... snip ...

168 was enhancement to 165 with faster memory technology and better
optimization of the 165 horizontal microcode getting avg. machine cycle
per 370 instructions down to 1.6 from 2.1. In that sense, the next new
(high-end 370) processor after the 165 in 1970 (except for 168 & 3033
increments and 3081 FS left-over) was 3090 in 1986, more than 15 years
later.

At the end of the ACS-360 article there is section on features from
ACS-360 finally showing up in IBM ES/9000 announced in 1990.

Anne & Lynn Wheeler

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May 4, 2013, 11:03:38 AM5/4/13
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Anne & Lynn Wheeler <ly...@garlic.com> writes:
> At the end of the ACS-360 article there is section on features from
> ACS-360 finally showing up in IBM ES/9000 announced in 1990.

announced with es/9000 in 1990 also fiber optic ESCON ... something that
had been kicking around POK for a decade or more. The rs/6000 had SLA
... which started out as escon ... but made full-duplex and approx. ten
percent faster ... along with significantly cheaper optical drivers.

I had been asked in 1988 to help LLNL standardize some serial technology
they had. The rs/6000 engineer that worked on proprietary 220mbit SLA
... wanted to turn around a do a 800mbit version. We convince him to
join the FCS standards committee and work on full-duplex 1gbit industry
standards (i.e. aggregate 2gbit, 1gbit concurrent in each direction).
In effect, could say that by the time ESCON finally made it out the
door, it was already obsolete.

This is what we are using for ha/cmp cluster scaleup ... mentioned in
this old post about early jan1992 meeting in ellison's conference room
http://www.garlic.com/~lynn/95.html#13
other past posts mentioning HA/CMP
http://www.garlic.com/~lynn/subtopic.html#hacmp

The native FCS has complete I/O requests being sent down the outbound
path effectively as data ... and then actual data occuring
asynchronously ... with minimal end-to-end handshaking latency. This
dates back at least to the work I did on HYPERChannel in 1980 for
mainframe channel extender (in the case of moving 300 people IMS group
to offsite, the local 3270 channel attached terminals worked better over
HYPERChannel 1.5mbit/sec link ... the end users saw no difference and
the real IBM mainframe channel efficiency improved 10-15%). some
past posts
http://www.garlic.com/~lynn/subnetwork.html#hsdt

Some POK channel engineers eventually become involved and define an
extremely heavy-weight layer on top of FCS (that significantly cuts the
native throughput of FCS) ... which morphs into FICON.
http://en.wikipedia.org/wiki/FICON

for instance from above:

FICON uses two Fibre Channel exchanges for a channel - control unit
connection -- one for each direction. So while a Fibre Channel exchange
is capable of carrying a command and response on a single exchange, and
all other FC-4 protocols work that way, the response to a FICON IU is
always on a different exchange from the IU to which it is a response.

... snip ...

recent z196 peak I/O benchmark got 2M IOPS using 104 FICON ... while
recent FCS announced for e5-2600 claims over million IOPS on single FCS.

Anne & Lynn Wheeler

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May 4, 2013, 11:49:34 AM5/4/13
to
Anne & Lynn Wheeler <ly...@garlic.com> writes:
> The native FCS has complete I/O requests being sent down the outbound
> path effectively as data ... and then actual data occuring
> asynchronously ... with minimal end-to-end handshaking latency. This
> dates back at least to the work I did on HYPERChannel in 1980 for
> mainframe channel extender (in the case of moving 300 people IMS group
> to offsite, the local 3270 channel attached terminals worked better over
> HYPERChannel 1.5mbit/sec link ... the end users saw no difference and
> the real IBM mainframe channel efficiency improved 10-15%). some
> past posts
> http://www.garlic.com/~lynn/subnetwork.html#hsdt

re:
http://www.garlic.com/~lynn/2013f.html#82 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#1 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#2 A Complete History Of Mainframe Computing


Two major people behind cdc6600 are Cray and Thornton; Cray leaves and
forms Cray Research (supercomputer) and Thornton leaves and forms Network
Systems (that does HYPERChannel).

In 1980, Network Systems wants to release my mainframe channel extender
HYPERChannel software support. The people in POK playing with what gets
released as ESCON a decade later, get it veto'ed because they are afraid
that if its in the market, it might interfere with them being able to
get ESCON released.

IBM eventually does a mainframe tcp/ip product ... however, because the
communication group is fighting off client/server and distributed
computing (in defense of their dumb terminal paradigm and their dumb
terminal emulation install base) ... some past posts
http://www.garlic.com/~lynn/subnetwork.html#terminal

they claim that the LAN/channel interface for tcp/ip is under their
control ... it gets enormously more expensive and significantly slower
... it has about 44kbytes/sec using nearly full 3090 cpu.

I then do the rfc1044 support and in some tuning tests between 4341 and
cray at cray research, it gets sustained channel throughput using only
modest amount of 4341 processor (about factor of 500 times improvement
in bytes moved per instruction executed). misc. past posts mentioning
rfc1044
http://www.garlic.com/~lynn/subnetwork.html#1044

Nigel Williams

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May 4, 2013, 8:34:16 PM5/4/13
to
On May 4, 12:06 pm, Quadibloc <jsav...@ecn.ab.ca> wrote:
> Caught a howler! The article on the Burroughs B 5000 is illustrated by
> a picture of the BRLESC.

If anyone has photos of the Burroughs B5000/B5500/B5700 they would be
willing to share, it would be much appreciated.

Especially looking for pictures of the line-printers used with that
system, variously known by model numbers: B320, B321 (B9240), B325,
B328, B329, B9241/B9941, B9946, B9242, B9245-2, B9245-3.

www.retroComputingTasmania.com

Robin Vowels

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May 4, 2013, 9:02:36 PM5/4/13
to
On May 4, 9:51 am, Anne & Lynn Wheeler <l...@garlic.com> wrote:
> reposted from ibm-main h/t phsiii
>
> A Complete History Of Mainframe Computinghttp://www.tomshardware.com/picturestory/508-mainframe-computer-histo...

At about 10 paragraphs, it seems somewhat short.

Why not post the entire article here?

Anne & Lynn Wheeler

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May 4, 2013, 9:37:07 PM5/4/13
to
Robin Vowels <robin....@gmail.com> writes:
> At about 10 paragraphs, it seems somewhat short.
>
> Why not post the entire article here?

re:
http://www.garlic.com/~lynn/2013f.html#82 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#1 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#2 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#3 A Complete History Of Mainframe Computing

???

tens of pictures of different computers with 2-4 paragraphs per computer
(series of web pages with one computer per page), starts with Harvard
Mark I through System z10 EC (article is from 2009)

maybe your browser isn't handling the web page(s)???

??? z10 EC webpage

The System z10 EC

While this article is supposed to be a history of big computers, this
last entry is about a computer that is still being sold today. But it
was sold yesterday too, and that's history, right? So, let's and take a
look at IBM's biggest and baddest computer on the planet, the System z10
EC.

In this day and age, it's hard to imagine a physically large computer,
but IBM did manage to create a 30 square ft. beast that weighed in at
over 5,000 pounds and consumed 27,500 watts of power. Still not
impressed? How about 1,520 GB of memory? Yes, that's a bit more than the
6 GB of most Core i7-based enthusiast boxes. Well, actually, that's a
bit more than the average hard disk of a PC with the Nehalem. It can
also have 1,024 ESCON, 336 FICON Express4, 336 FICON Express2, 120 FICON
Express, 96 OSA-Express3, and 48 OSA-Express2 channels. That's more I/O
than the X58, wouldn't you agree? Maybe several orders of magnitude
more? This amazing machine can even host up to 16 virtual LANs in one
machine.

Needless to say, these computers far exceed your normal server and, in
fact, consolidate many smaller x86-processor machines. Rather than
fading into oblivion, mainframes are finding customers that never used
them before and wish to consolidate their x86

....

z196 (next machine after z10) peak I/O benchmark doing 2M IOPS with 104
FICON (ficon is mainframe channel paradigm layer built on top of FCS
that significantly reduces throughput compared to base FCS)
.... compared to recently announced FCS for e5-2600 blade claiming over
million IOPS for single FCS
http://en.wikipedia.org/wiki/FICON

... max z196 is 80 processors and 50BIPS, 625MIPS/processor (older z10
has max 64 processors and 30BIPS, 459MIPS/processor; newer ec12 is 101
processors and 75BIPS) ... compared to e5-2600 at 527BIPS (two chips
with 8cores/chip, 16processors, 33BIPS/processor, recent new intel
technology is claiming to double performance and 12cores/chip,
i.e. e5-2600v2 later this year)

z196 (newer than z10) has 14 system assist processors for I/O will
handle up to 2.2M SSCH/sec with all SAPs running 100% percent CPU
... but recommendation is to limit SAPs to 70% CPU or 1.5M SSCH/sec. So
far, ec12 claims are that it will be able to do 30% more IOPS than z196.

misc. past posts mentioning z196 peak i/o benchmark
http://www.garlic.com/~lynn/2012m.html#4 Blades versus z was Re: Turn Off Another Light - Univ. of Tennessee
http://www.garlic.com/~lynn/2012m.html#13 Intel Confirms Decline of Server Giants HP, Dell, and IBM
http://www.garlic.com/~lynn/2012m.html#43 Blades versus z was Re: Turn Off Another Light - Univ. of Tennessee
http://www.garlic.com/~lynn/2012m.html#67 How do you feel about the fact that today India has more IBM employees than any of the other countries in the world including the USA.?
http://www.garlic.com/~lynn/2012n.html#9 How do you feel about the fact that today India has more IBM employees than any of the other countries in the world including the USA.?
http://www.garlic.com/~lynn/2012n.html#13 System/360--50 years--the future?
http://www.garlic.com/~lynn/2012n.html#44 Under what circumstances would it be a mistake to migrate applications/workload off the mainframe?
http://www.garlic.com/~lynn/2012n.html#46 history of Programming language and CPU in relation to each
http://www.garlic.com/~lynn/2012n.html#48 Under what circumstances would it be a mistake to migrate applications/workload off the mainframe?
http://www.garlic.com/~lynn/2012n.html#70 Under what circumstances would it be a mistake to migrate applications/workload off the mainframe?
http://www.garlic.com/~lynn/2012n.html#72 Mainframes are still the best platform for high volume transaction processing
http://www.garlic.com/~lynn/2012o.html#6 Mainframes are still the best platform for high volume transaction processing
http://www.garlic.com/~lynn/2012o.html#21 Assembler vs. COBOL--processing time, space needed
http://www.garlic.com/~lynn/2012o.html#25 Blades versus z was Re: Turn Off Another Light - Univ. of Tennessee
http://www.garlic.com/~lynn/2012o.html#46 Random thoughts: Low power, High performance
http://www.garlic.com/~lynn/2012p.html#12 HCF [was Re: AMC proposes 1980s computer TV series "Halt &Catch Fire"]
http://www.garlic.com/~lynn/2013.html#10 From build to buy: American Airlines changes modernization course midflight
http://www.garlic.com/~lynn/2013b.html#6 mainframe "selling" points
http://www.garlic.com/~lynn/2013b.html#7 mainframe "selling" points
http://www.garlic.com/~lynn/2013c.html#63 What Makes an Architecture Bizarre?
http://www.garlic.com/~lynn/2013c.html#68 relative mainframe speeds, was What Makes an Architecture Bizarre?
http://www.garlic.com/~lynn/2013c.html#84 What Makes an Architecture Bizarre?
http://www.garlic.com/~lynn/2013d.html#16 relative mainframe speeds, was What Makes an Architecture Bizarre?
http://www.garlic.com/~lynn/2013e.html#4 Oracle To IBM: Your 'Customers Are Being Wildly Overcharged'
http://www.garlic.com/~lynn/2013f.html#38 Reports: IBM may sell x86 server business to Lenovo
http://www.garlic.com/~lynn/2013f.html#57 The cloud is killing traditional hardware and software
http://www.garlic.com/~lynn/2013f.html#70 How internet can evolve
http://www.garlic.com/~lynn/2013f.html#73 The cloud is killing traditional hardware and software
http://www.garlic.com/~lynn/2013g.html#2 A Complete History Of Mainframe Computing

Nigel Williams

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May 5, 2013, 5:10:00 AM5/5/13
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On May 5, 10:34 am, Nigel Williams <n...@retrocomputingtasmania.com>
wrote:
> If anyone has photos of the Burroughs B5000/B5500/B5700 they would be
> willing to share, it would be much appreciated.

I've started a gallery here of all the found pictures of Burroughs
B5x00 systems with a commentary of what I think is in the pictures,
corrections or additions most welcome:

http://www.retrocomputingtasmania.com/home/projects/burroughs-b5500/b5000_b5500_gallery

Shmuel Metz

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May 5, 2013, 1:50:29 PM5/5/13
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In <m3wqreg...@garlic.com>, on 05/04/2013
at 10:06 AM, Anne & Lynn Wheeler <ly...@garlic.com> said:

>one might claim that amdahl's clone was more "IBM 360" than the 3081

Why? They both implimented the S/370 architecture.

--
Shmuel (Seymour J.) Metz, SysProg and JOAT <http://patriot.net/~shmuel>

Unsolicited bulk E-mail subject to legal action. I reserve the
right to publicly post or ridicule any abusive E-mail. Reply to
domain Patriot dot net user shmuel+news to contact me. Do not
reply to spam...@library.lspace.org

Shmuel Metz

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May 5, 2013, 1:51:05 PM5/5/13
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In <aujllt...@mid.individual.net>, on 05/04/2013
at 06:46 AM, Bob Martin <bob.m...@excite.com> said:

>Subject should be "A Complete History of Mainframe Computing in the
>USA"

No; it's not complete even for US.

Anne & Lynn Wheeler

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May 5, 2013, 4:49:54 PM5/5/13
to
Shmuel (Seymour J.) Metz <spam...@library.lspace.org.invalid> writes:
> Why? They both implimented the S/370 architecture.

re:
http://www.garlic.com/~lynn/2013f.html#82 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#1 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#2 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#3 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#4 A Complete History Of Mainframe Computing

3081 was built out of pieces that were originally intended for Future
System ... as opposed to s/370 (while Amdahl's machine was built to be
s/370) ... it helps explain the poor 3081 performance in relationship to
the enormous number of circuits in the machine (especially compared to
Amdahl's machine)
http://www.jfsowa.com/computer/memo125.htm

3081D ... original 3081D was suppose to have both processors running at
5mips (10mips aggregate) ... but some benchmarks came out 20% slower
than 4.5mip 3033. the size of the processor cache was doubled for 3081K
... which supposedly improved each processor from 5mips to 7mips (but
each 3081d processor was hardly 5mips to begin with).

old email
http://www.garlic.com/~lynn/2011b.html#email830123
in this post
http://www.garlic.com/~lynn/2011b.html#49 vm/370 3081

and
http://www.garlic.com/~lynn/2011b.html#email820820
http://www.garlic.com/~lynn/2011b.html#email821008
http://www.garlic.com/~lynn/2011b.html#email841012
http://www.garlic.com/~lynn/2011b.html#email841012b
in this post
http://www.garlic.com/~lynn/2011b.html#62 vm/370 3081

mentioning two-processor 3081k to have about 1.5times throughput of
single processor 3033up

other posts in above thread:
http://www.garlic.com/~lynn/2011b.html#68 vm/370 3081
http://www.garlic.com/~lynn/2011b.html#70 vm/370 3081

Peter Flass

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May 6, 2013, 7:32:46 AM5/6/13
to
On 5/5/2013 1:51 PM, Shmuel (Seymour J.) Metz wrote:
> In <aujllt...@mid.individual.net>, on 05/04/2013
> at 06:46 AM, Bob Martin <bob.m...@excite.com> said:
>
>> Subject should be "A Complete History of Mainframe Computing in the
>> USA"
>
> No; it's not complete even for US.
>

And what the heck is with the ads?

--
Pete

Scott Lurndal

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May 6, 2013, 10:28:24 AM5/6/13
to
Anne & Lynn Wheeler <ly...@garlic.com> writes:
>
>reposted from ibm-main h/t phsiii
>
>A Complete History Of Mainframe Computing
>http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html
>

The Atanasoff-Berry computer was built at my alma matter. During my time as
computer science club president, we used the single remaining
element from this computer (the drum at rear-center on the unit) as a display
item during the annual campus shindig, VEISHEA. We'd also have Dr. Atanasoff
come to speak to the club once a year and we'd take him out to dinner.

The drum had an array of contact points that would brush past a reader finger and a
'jogger'[*] finger as the drum rotated. Basically one end of a cap tied to
the center axle.

The department chairman when I was there had been the one
to unwittingly disassemble the ABC when he was a grad student making office space
in the basement of the physics building.

The university build a replica about a decade ago.

scott

[*] To 'jog' the memory. He tells of a long trip from Ames to the mighty muddy
(long trip in the thirties) where many of the concepts gelled. He then showed his
invention to Eckert & Mauchley who used many of his concepts in ENIAC culminating
in a lawsuit in the 1970's.

Scott Lurndal

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May 6, 2013, 10:38:30 AM5/6/13
to
AdBlock is your friend. I didn't see any ads.

scott

Charles Richmond

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May 6, 2013, 2:52:23 PM5/6/13
to
"Scott Lurndal" <sc...@slp53.sl.home> wrote in message
news:c6Pht.14389$Ky3....@fed17.iad...
> Anne & Lynn Wheeler <ly...@garlic.com> writes:
>>
>>reposted from ibm-main h/t phsiii
>>
>>A Complete History Of Mainframe Computing
>>http://www.tomshardware.com/picturestory/508-mainframe-computer-history.html
>>
>
> The Atanasoff-Berry computer was built at my alma matter. During my time
> as
> computer science club president, we used the single remaining
> element from this computer (the drum at rear-center on the unit) as a
> display
> item during the annual campus shindig, VEISHEA. We'd also have Dr.
> Atanasoff
> come to speak to the club once a year and we'd take him out to dinner.
>
> The drum had an array of contact points that would brush past a reader
> finger and a
> 'jogger'[*] finger as the drum rotated. Basically one end of a cap tied
> to
> the center axle.
>
> The department chairman when I was there had been the one
> to unwittingly disassemble the ABC when he was a grad student making
> office space
> in the basement of the physics building.
>
> The university build a replica about a decade ago.
>
Yes, the drum memory for the ABC computer was supposedly the first "dynamic
RAM", made up of capacitors around the drum that had to have their charges
refreshed.

> scott
>
> [*] To 'jog' the memory. He tells of a long trip from Ames to the mighty
> muddy
> (long trip in the thirties) where many of the concepts gelled. He then
> showed his
> invention to Eckert & Mauchley who used many of his concepts in ENIAC
> culminating
> in a lawsuit in the 1970's.

I had always heard... that it was John Mauchly alone who had conferred with
Atanasoff, and *not* J. Presper Eckert.

--

numerist at aquaporin4 dot com

Anne & Lynn Wheeler

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May 15, 2013, 2:44:10 PM5/15/13
to
Anne & Lynn Wheeler <ly...@garlic.com> writes:
> z196 (next machine after z10) peak I/O benchmark doing 2M IOPS with 104
> FICON (ficon is mainframe channel paradigm layer built on top of FCS
> that significantly reduces throughput compared to base FCS)
> .... compared to recently announced FCS for e5-2600 blade claiming over
> million IOPS for single FCS
> http://en.wikipedia.org/wiki/FICON


re:
http://www.garlic.com/~lynn/2013f.html#82 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#1 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#2 A Complete History Of Mainframe Computing
http://www.garlic.com/~lynn/2013g.html#3 A Complete History Of Mainframe Computing

Fibre Channel (FCS)
http://en.wikipedia.org/wiki/Fibre_Channel
Scalable Coherent Interface
http://en.wikipedia.org/wiki/Scalable_Coherent_Interface
some recent refs (including mainframe ESCON was obsolete by the time it
was released in early 90s with ES/9000)
http://www.garlic.com/~lynn/2013g.html#14 Tech Time Warp of the Week: The 50-Pound Portable PC, 1977
http://www.garlic.com/~lynn/2013g.html#23 Old data storage or data base
http://www.garlic.com/~lynn/2013g.html#41 A History Of Mainframe Computing

In 1988, I had been asked to help LLNL standardized FCS. In 1990, I was
also pulled into SCI (scalable coherent interface, another fiber-optic
serial standard, was being pushed for higher I/O than FCS as well as
memory bus operation) ... being pushed by Gustavson out of SLAC. SCI
then shows up in memory bus for Convex (HP risc), SGI (MIPS risc),
Sequent (i486), and Data General (i486). Later we do some consulting at
Convex, SGI, and Sequent (later HP buys Convex and IBM buys Sequent)

the cluster scaleup being transfered and being told we couldn't work
on anything with more than four processors, contributed significantly
to the decision to leave later that year. recent references
http://www.garlic.com/~lynn/2013g.html#22 What Makes core storage management so cool?
http://www.garlic.com/~lynn/2013g.html#40 The Vindication of Barb
past posts mentioning ha/cmp
http://www.garlic.com/~lynn/subtopic.html#hacmp

much of my career I was told that I had no career and couldn't expect
promotions, also that top technical positions were quite political in the
corporation and I had managed to offend quite a number of executives.
In the earlier 80s, I was told that they refused to make me IBM Fellow,
but then some of the Fellows provided funding and project support
behind the scenes; I was even included in discussions about creation
of the STSM level. some of this was explained as the significant IBM
corporate culture change to "make no waves" and "syncophancy" that
occurred as FS was failing
http://www.garlic.com/~lynn/submain.html#futuresys

from annals of "truth is stranger is fiction" ... after my last day, I
get a letter at home saying I was promoted to STSM. Past posts
referencing the after-the-fact promotion
http://www.garlic.com/~lynn/2010l.html#74 CSC History
http://www.garlic.com/~lynn/2010q.html#50 I actually miss working at IBM
http://www.garlic.com/~lynn/2011c.html#87 A History of VM Performance
http://www.garlic.com/~lynn/2012k.html#26 How to Stuff a Wild Duck

from long ago and far away ... part of departing "goodby" message (my
ftp/anon had shadow of all sorts of things, lots of standards meetings
and notes as well as internet RFCs, drafts and other documents), "DSD"
refers to the mainframe division:

Date: Jul 22 18:50:37 1992
From: wheeler
Subject: departure

wheeler.losgatos.ibm.com ftp/anon repository is shutdown.

i made 3-4 postings to convex forum on chaste tools disk with respect
to sci, etc.

fyi, attached is summary/overview of DSD/executive presentation on
clustering that i gave in hudson valley a week ago monday.

+++++
Lynn Wheeler - rip 31jul92

xxxxxxxxxxxxx reference xxxxxxxxxxxx

Four Tier Asynchronous Computer Model

* super-scalar asynchronous operation
* tightly-coupled SMP operation with weakly-ordered or relaxed memory
consistency
* loosely-coupled multiprocessing with high-performance, light-weight
I/O programming model
* networked clusters

. information contained here-in is non-proprietary and taken from
widely available public domain literature

------------------------

... snip lots of detail ...

------------------------

1Q93 Design Point

* single board 4-way SMP
* super-scaler 400mips aggregate
* shared L2-cache, 1meg or larger
* hardware SMP parallelism assists
* interleaved 500mbyte memory
* multiple Fibre Channel Standard full-duplex attachments
* I/O processing off-loaded and pipelined
* FCS-switch fully-meshed interconnect for inter-processor
communication as well as I/O device attachment
* IO.INTensive = 520mbyte/400mips
. 3-4 1gbit FCS links (@200mbyte) per board
. for 25% IO.INTensive substitute quarter-speed FCS
* between one and 24-32 4-way SMP boards in a box
. 4-128 processors in a box
. 400 to 12,800 mips in a box
. SMP boards interconnected with FCS in LCMP-cluster
* one or more boxes in a LCMP-cluster
. FCS interconnect, I/O attachment and switches
* no-single-point-of-failure
* high-performance configurable intelligent RAID controllers


------------------------
1Q94 Design Point

* single board 4-way SMP
* super-scaler 1000mips aggregate
* shared L2-cache, 4meg or larger
* hardware SMP parallelism assists
* interleaved 1gbyte SCI memory attachment
* between one and 24-32 4-way SMP boards in a box
. 4-128 processors in a box
. 1,000 to 32,000 mips in a box
. SMP boards using multiple 1gbyte SCI connections
for n-way cache coherency across whole box
* multiple FCS full-duplex attachments
* FCS-switch for processor interconnect and device
attachment
* IO.INTensive = 1.3gbyte/1000mip
. 7-8 1gbit FCS links (@200mbyte) per board
. some combination of 1gbyte SCI IO link and 1gbit FCS links
* LCMP-clusters created with two or more SMP boxes
. LCMP box boundaries for failure isolation.
. FCS interconnect, I/O attachment and switches
. SCI I/O attachment, switches, and rings
* long distance (2km & above) gbit FCS interconnect for
geographically separated, disaster survivability operation

... snip ...
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