arm: exynos5420.dtsi: add device tree nodes for ADC [chromiumos/third_party/kernel-next : chromeos-3.8]

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Arun Kumar K (Code Review)

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May 22, 2013, 12:03:26 PM5/22/13
to Olof Johansson, naveen krishna chatradhi
Arun Kumar K has uploaded a new change for review.

https://gerrit.chromium.org/gerrit/56211


Change subject: arm: exynos5420.dtsi: add device tree nodes for ADC
......................................................................

arm: exynos5420.dtsi: add device tree nodes for ADC

this patch adds the device tree nodes for ADC on exynos5420.

BUG=chrome-os-partner:19007
TEST=booted on smdk5420 and find the adc probed properly.

Change-Id: Ic2b7b37bb01d13c535530503daebdfd24a577afd
Signed-off-by: Naveen Krishna Chatradhi <ch.n...@samsung.com>

Conflicts:
arch/arm/boot/dts/exynos5420.dtsi
---
M arch/arm/boot/dts/exynos5420-smdk5420.dts
M arch/arm/boot/dts/exynos5420.dtsi
2 files changed, 23 insertions(+), 0 deletions(-)


git pull ssh://gerrit.chromium.org:29418/chromiumos/third_party/kernel-next refs/changes/11/56211/1

diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index c33b098..165001c 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -184,6 +184,14 @@
regulator-boot-on;
};

+ buck5_reg: BUCK5 {
+ regulator-name = "vdd_1v8";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
buck6_reg: BUCK6 {
regulator-name = "vdd_kfc";
regulator-min-microvolt = <800000>;
@@ -316,4 +324,8 @@
status = "okay";
samsung,fs-mode;
};
+
+ adc@12D10000 {
+ vdd-supply = <&buck5_reg>;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b65388c..4435409 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -468,4 +468,15 @@
clock-names = "hsi2c";
status = "disabled";
};
+
+ adc: adc@12D10000 {
+ compatible = "samsung,exynos-adc-v2";
+ reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+ interrupts = <0 106 0>;
+ clocks = <&clock 270>;
+ clock-names = "adc";
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+ };
+
};

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Gerrit-MessageType: newchange
Gerrit-Change-Id: I3a3fc84ee09befc39579d12235eca187638d0fb8
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Arun Kumar K <aru...@samsung.com>
Gerrit-Reviewer: naveen krishna chatradhi <nav...@chromium.org>

Arun Kumar K (Code Review)

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May 22, 2013, 12:03:26 PM5/22/13
to naveen krishna chatradhi, Olof Johansson
Hello naveen krishna chatradhi,

I'd like you to do a code review. Please visit

https://gerrit.chromium.org/gerrit/56218

to review the following change.

Change subject: arm: exynos5420.dtsi: add device tree nodes for i2c and hsi2c channels
......................................................................

arm: exynos5420.dtsi: add device tree nodes for i2c and hsi2c channels

this patch adds the device tree nodes for i2c(4) and hsi2c(7) channels
for exynos5420.

BUG=chrome-os-partner:19007
TEST=should be able to probe the i2c channels on exynos5 device once the
config symbols are enabled

Change-Id: I06eb74807895d026f8c39dde067ac606cb158dd4
Signed-off-by: Naveen Krishna Chatradhi <ch.n...@samsung.com>
---
M arch/arm/boot/dts/exynos5420-smdk5420.dts
M arch/arm/boot/dts/exynos5420.dtsi
2 files changed, 346 insertions(+), 0 deletions(-)


git pull ssh://gerrit.chromium.org:29418/chromiumos/third_party/kernel-next refs/changes/18/56218/1

diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index b59aeb4..c33b098 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -124,4 +124,196 @@
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
};
+
+ i2c@12C70000 {
+ status = "okay";
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-max-bus-freq = <20000>;
+
+ wm8994: wm8994@1a {
+ compatible = "wlf,wm8994";
+ reg = <0x1a>;
+ };
+ };
+
+ hsi2c_4: hsi2c@12CA0000 {
+ status = "okay";
+ samsung,fs-mode;
+
+ s2mps11_pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+ s2mps11,buck2-ramp-delay = <12>;
+ s2mps11,buck34-ramp-delay = <12>;
+ s2mps11,buck16-ramp-delay = <12>;
+ s2mps11,buck6-ramp-enable = <1>;
+ s2mps11,buck2-ramp-enable = <1>;
+ s2mps11,buck3-ramp-enable = <1>;
+ s2mps11,buck4-ramp-enable = <1>;
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = "vdd_mif";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "vdd_int";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "vdd_g3d";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "vdd_kfc";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "vdd_vmem";
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-name = "vdd_ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "vdd_ldo6";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "vdd_ldo7";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo8_reg: LDO8 {
+ regulator-name = "vdd_ldo8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "vdd_ldo9";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "vdd_ldo10";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "vdd_ldo11";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "vdd_ldo12";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "vdd_ldo13";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "vdd_ldo15";
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-always-on;
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "vdd_ldo16";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2200000>;
+ regulator-always-on;
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "tsp_avdd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo19_reg: LDO19 {
+ regulator-name = "vdd_sd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+
+ ldo24_reg: LDO24 {
+ regulator-name = "tsp_io";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+ };
+ };
+ };
+
+ hsi2c_5: hsi2c@12CB0000 {
+ status = "okay";
+ samsung,fs-mode;
+ };
+
+ hsi2c_6: hsi2c@12CC0000 {
+ status = "okay";
+ samsung,fs-mode;
+ };
+
+ hsi2c_7: hsi2c@12CD0000 {
+ status = "okay";
+ samsung,fs-mode;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 50d0f09..b65388c 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -25,6 +25,17 @@
mshc0 = &dwmmc_0;
mshc1 = &dwmmc_1;
mshc2 = &dwmmc_2;
+ i2c0 = &i2c_0;
+ i2c1 = &i2c_1;
+ i2c2 = &i2c_2;
+ i2c3 = &i2c_3;
+ i2c4 = &hsi2c_4;
+ i2c5 = &hsi2c_5;
+ i2c6 = &hsi2c_6;
+ i2c7 = &hsi2c_7;
+ i2c8 = &hsi2c_8;
+ i2c9 = &hsi2c_9;
+ i2c10 = &hsi2c_10;
};

clock: clock-controller@0x10010000 {
@@ -314,4 +325,147 @@
clocks = <&clock 501>, <&clock 500>;
clock-names = "g3d", "aclk_g3d";
};
+
+ i2c_0: i2c@12C60000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C60000 0x100>;
+ interrupts = <0 56 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_bus>;
+ clocks = <&clock 261>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_1: i2c@12C70000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C70000 0x100>;
+ interrupts = <0 57 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_bus>;
+ clocks = <&clock 262>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_2: i2c@12C80000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C80000 0x100>;
+ interrupts = <0 58 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_bus>;
+ clocks = <&clock 263>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ i2c_3: i2c@12C90000 {
+ compatible = "samsung,s3c2440-i2c";
+ reg = <0x12C90000 0x100>;
+ interrupts = <0 59 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_bus>;
+ clocks = <&clock 264>;
+ clock-names = "i2c";
+ status = "disabled";
+ };
+
+ hsi2c_4: hsi2c@12CA0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CA0000 0x1000>;
+ interrupts = <0 60 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_hs_bus>;
+ clocks = <&clock 265>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_5: hsi2c@12CB0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CB0000 0x1000>;
+ interrupts = <0 61 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5_hs_bus>;
+ clocks = <&clock 266>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_6: hsi2c@12CC0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CC0000 0x1000>;
+ interrupts = <0 62 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6_hs_bus>;
+ clocks = <&clock 267>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_7: hsi2c@12CD0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CD0000 0x1000>;
+ interrupts = <0 63 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_hs_bus>;
+ clocks = <&clock 268>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_8: hsi2c@12E00000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CE0000 0x1000>;
+ interrupts = <0 87 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c8_hs_bus>;
+ clocks = <&clock 281>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_9: hsi2c@12E10000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CE1000 0x1000>;
+ interrupts = <0 88 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c9_hs_bus>;
+ clocks = <&clock 282>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
+
+ hsi2c_10: hsi2c@12E20000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12CE2000 0x1000>;
+ interrupts = <0 203 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c10_hs_bus>;
+ clocks = <&clock 283>;
+ clock-names = "hsi2c";
+ status = "disabled";
+ };
};

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Doug Anderson (Code Review)

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May 24, 2013, 12:01:50 AM5/24/13
to Arun Kumar K, naveen krishna chatradhi, Andrew Bresticker, ChromeBot, Simon Glass
Doug Anderson has posted comments on this change.

Change subject: ARM: dts: exynos5420: add i2c and hsi2c busses
......................................................................


Patch Set 2: I would prefer that you didn't submit this

I think it would be slightly easier to deal with rebases in the future if we split into 3 patches:
* exynos5250.dtsi
* smdk
* pit

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Simon Glass (Code Review)

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May 24, 2013, 2:20:24 AM5/24/13
to Arun Kumar K, naveen krishna chatradhi, Andrew Bresticker, ChromeBot, Doug Anderson
Simon Glass has posted comments on this change.

Change subject: ARM: dts: smdk5420: add i2c busses and devices
......................................................................


Patch Set 4: Looks good to me, approved

(1 inline comment)

LGTM with suggestion

....................................................
File arch/arm/boot/dts/exynos5420-smdk5420.dts
Line 103: hsi2c@12CA0000 {
Suggest adding comments to these nodes with the bus number, like:

/* hsi2c4 */


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Andrew Bresticker (Code Review)

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May 24, 2013, 12:20:22 PM5/24/13
to Arun Kumar K, naveen krishna chatradhi, ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: smdk5420: add i2c busses and devices
......................................................................


Patch Set 4: (1 inline comment)

....................................................
File arch/arm/boot/dts/exynos5420-smdk5420.dts
Line 103: hsi2c@12CA0000 {
Done


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Andrew Bresticker (Code Review)

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May 24, 2013, 12:35:47 PM5/24/13
to Arun Kumar K, naveen krishna chatradhi, ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: smdk5420: add i2c busses and devices
......................................................................


Patch Set 5: Looks good to me, approved; Ready; Verified

Carrying Simon's +2.

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Andrew Bresticker (Code Review)

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May 24, 2013, 1:49:10 PM5/24/13
to Arun Kumar K, naveen krishna chatradhi, ChromeBot, Doug Anderson, Simon Glass
Andrew Bresticker has posted comments on this change.

Change subject: ARM: dts: smdk5420: add i2c busses and devices
......................................................................


Patch Set 5: Ready

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Simon Glass (Code Review)

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Jun 13, 2013, 9:17:25 PM6/13/13
to Arun Kumar K, naveen krishna chatradhi, ChromeBot, Doug Anderson
Simon Glass has posted comments on this change.

Change subject: arm: exynos5420.dtsi: add device tree nodes for ADC
......................................................................


Patch Set 1: I would prefer that you didn't submit this

(1 inline comment)

....................................................
File arch/arm/boot/dts/exynos5420-smdk5420.dts
Line 189: regulator-min-microvolt = <800000>;
Does it support running at 800mW?


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Doug Anderson (Code Review)

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Jun 20, 2013, 6:34:53 PM6/20/13
to Arun Kumar K, naveen krishna chatradhi, ChromeBot, Simon Glass
Doug Anderson has posted comments on this change.

Change subject: arm: exynos5420.dtsi: add device tree nodes for ADC
......................................................................


Patch Set 1: Do not submit

Similar change landed here <https://gerrit.chromium.org/gerrit/59153>. Abandon? Removing myself.

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Gerrit-MessageType: comment
Gerrit-Change-Id: I3a3fc84ee09befc39579d12235eca187638d0fb8
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Arun Kumar K <arunkk....@gmail.com>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>
Gerrit-Reviewer: Doug Anderson <dian...@chromium.org>
Gerrit-Reviewer: Simon Glass <s...@chromium.org>

Arun Kumar K (Code Review)

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Jun 21, 2013, 2:51:00 AM6/21/13
to naveen krishna chatradhi, ChromeBot, Simon Glass
Arun Kumar K has abandoned this change.

Change subject: arm: exynos5420.dtsi: add device tree nodes for ADC
......................................................................


Patch Set 1: Abandoned

Abandoned as the change landed in another patch.

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To view, visit https://gerrit.chromium.org/gerrit/56211
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Gerrit-MessageType: abandon
Gerrit-Change-Id: I3a3fc84ee09befc39579d12235eca187638d0fb8
Gerrit-PatchSet: 1
Gerrit-Project: chromiumos/third_party/kernel-next
Gerrit-Branch: chromeos-3.8
Gerrit-Owner: Arun Kumar K <arunkk....@gmail.com>
Gerrit-Reviewer: ChromeBot <chrom...@google.com>
Gerrit-Reviewer: Simon Glass <s...@chromium.org>
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